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Chapter 06
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Figure 6.1 Placing 2D threads into linear order.
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Figure 6.2 A simple sum reduction kernel.
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Figure 6.3 Execution of the sum reduction kernel.
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Figure 6.4 A kernel with fewer thread divergence.
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Figure 6.5 Execution of the revised algorithm.
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Figure 6.6 Placing matrix elements into linear order.
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Figure 6.7 Memory access patterns in C 2D arrays for coalescing.
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Figure 6.8 A coalesced access pattern.
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Figure 6.9 An uncoalesced access pattern.
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Figure 6.10 Using shared memory to enable coalescing.
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Figure 6.11 Tiled matrix multiplication kernel using shared memory.
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Figure 6.12 Increased thread granularity with rectangular tiles.
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