1. Chapter5: Synchronous Sequential Logic – Part 4
Originally Reham S. Al-Majed
Imam Muhammad Bin Saud University

2. Outline Design procedure Design with D FF. Design with JK FF.
Design with T FF.

3. Design Procedure
It specifies the hardware that will implement a desired behavior.
Given:
Set of specifications.
Goal:
Find logic diagram.
Input and output equations provide the necessary information to draw the logic diagram of SC.
Steps:
Derive a state diagram from the word description.
Obtain the binary-coded state table.
Choose the type of FF to be used.
Derive the simplified FF input equations and output equations.
Draw the logic diagram.

4. Design with JK FF No specification. Given state diagram.
Derive state table.
JK FFs input.

5. Design with JK FF
Simplify inputs to FF

6. Design with JK FF
Draw logic diagram.

7. Design with D FF
Design a sequential circuit that detect a sequence of three or more consecutive ones in a string of bits coming through an input line. Use D FF.
Derive state diagram from specification
00/0
01/0 1 1
11/1
10/0 1 1

8. Design with D FF Obtain the binary coded state table.
Choose type of FF

9. Design with D FF
Derive the simplified FF input equations.

10. Design with D FF
Draw logic diagram.

11. Exercise
Design a sequential circuit using T FF that counts in binary information from 0 to 7.

12. Reading
5.1
5.2
5.3
5.4
5.5
5.8