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Instructor: Alexander Stoytchev

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1 Instructor: Alexander Stoytchev
CprE 281: Digital Logic Instructor: Alexander Stoytchev

2 FSM as an Arbiter Circuit
CprE 281: Digital Logic Iowa State University, Ames, IA Copyright © Alexander Stoytchev

3 Administrative Stuff Homework 11 is out
It is due on Monday Dec 9, 4pm

4 Administrative Stuff Extra Credit Homework #2 is out
Posted on the class web page There are 4 problems Due no later than the last lab for this semester Submit your design on paper and demonstrate your circuit to the lab TAs using the boards in the lab.

5 Administrative Stuff Final Project (10% of your grade)
Posted on the class web page (Labs section) This is due next week (during your lab)

6 Administrative Stuff Problem #1 from the Final Project
If you picked that one please stop by after class

7 Arbiter Circuit

8 Goal Design a machine that controls access by several devices to a shared resource The resource can be used by only one device at a time Any changes can occur only on the positive edge of the clock signal Each device provides one input the the FSM, which is called a request The FSM produces one output for each device, which is called a grant

9 Goal The requests from the devices are prioritized
If two requests are active at the same time, then only the device with the highest priority will be given access to the shared resource After a device is done with the shared resource, it must make its request signal equal to 0. If there are no outstanding requests, then the FSM stays in an Idle state

10 Conceptual Diagram Request1 Device 1 Grant1 Request2 Shared Arbiter
resource Request3 Device 3 Grant3

11 Conceptual Diagram Request1 Device 1 Grant1 Request2 Shared Arbiter
resource Request3 Device 3 Grant3 Request (r) Grant (g) [ Figure 9.20 from the textbook ]

12 State diagram for the arbiter
Idle 000 1xx Reset gnt1 g 1 = x1x gnt2 2 xx1 gnt3 3 0xx 01x x0x 001 xx0 [ Figure 6.72 from the textbook ]

13 State diagram for the arbiter
Idle 000 1xx Reset gnt1 g 1 = x1x gnt2 2 xx1 gnt3 3 0xx 01x x0x 001 xx0 Highest Priority Device

14 State diagram for the arbiter
Idle 000 1xx Reset gnt1 g 1 = x1x gnt2 2 xx1 gnt3 3 0xx 01x x0x 001 xx0 Highest Priority Device Lowest Priority Device

15 State diagram for the arbiter
Idle 000 1xx Reset gnt1 g 1 = x1x gnt2 2 xx1 gnt3 3 0xx 01x x0x 001 xx0 The three request bits r1 r2 r3

16 State diagram for the arbiter
Each device must release the resource after it is done using it Idle 000 1xx Reset gnt1 g 1 = x1x gnt2 2 xx1 gnt3 3 0xx 01x x0x 001 xx0

17 Alternative style of state diagram for the arbiter
1 2 3 Idle Reset gnt1 g = gnt2 gnt3 [ Figure 6.73 from the textbook ]

18 Questions?

19 THE END


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