1. Chapter 5 Arithmetic and Logic Instructions
Instructor：Dr. Yu Youling

2. Content Addition, Subtraction and Comparison
Multiplication and Division
BCD and ASCII Arithmetic
Basic Logic Instructions
Shift and Rotate
String Comparisons
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3. Addition, Subtraction and Comparison
The ADD instruction is used for binary addition.
The addition causes the flag bits to change.
Sign(S) ,overflow(O), zero(Z),Carry(C), auxiliary carry(A),parity(P)
Addition can be 8-, 16-, and 32-bits.
All of the addressing modes presented in Chapter 2 are used by addition.
Memory-to-memory and segment register addition are not allowed
Over variations of the ADD instruction
ADD, INC, ADC, XADD
ADD EAX,EBX ;EAX = EAX + EBX
ADD [BX], AL
ADD BYTE PTR[DI], 3
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4. Addition, Subtraction and Comparison
Increment
The INC instruction adds a one to a register or the contents of a memory location.
Important
INC does not affect the CARRY(C) flag bit
In some cases, it is different from the ADD instruction, i.e. ADD BX,1
INC BX ;BX = BX + 1
INC BYTE PTR [EBX]
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5. Addition, Subtraction and Comparison
Add with Carry
The ADC instruction adds the carry bit into the sum. Used for wide additions (wider than 32-bits) and other reasons.
ADD AX,CX ;AX = AX + CX
ADC BX,DX ;BX = BX + DX +C
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6. Addition, Subtraction and Comparison
The SUB instruction performs subtraction and the flags change to reflect condition of the result.
Sign(S) ,overflow(O), zero(Z),Carry(C), auxiliary carry(A),parity(P)
As with other arithmetic and logic instructions, subtraction exists for 8-, 16-, and 32-bit data.
Over 1000 possible variations
SUB, DEC, SBB,CMP,CMPXCHG
MOV CH, 22H
SUB CH,44H ;CH = CH – 44H
Z=0,C=1,A=1,S=1,P=1,O=0
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7. Addition, Subtraction and Comparison
Decrement
The DEC instruction subtracts one from a register or the contents of a memory location.
The Carry(C) flag bit is not affected.
DEC EBX ;EBX = EBX - 1
DEC DWORD PTR [EAX]
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8. Addition, Subtraction and Comparison
Subtract with Borrow
The SBB instruction subtracts with borrow (where the borrow is held in the carry flag).
SUB AX,DI ;AX = AX – DI
SBB BX,SI ;BX = BX – SI -C
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9. Addition, Subtraction and Comparison
The CMP instruction is a special form of the SUB instruction.
A comparison does not change the destination operand.
No assignment to the destination
Only the flag bits changes to reflect the difference.
Usually followed by a conditional jump instruction.
JA,JAE,JB,JBE,JZ,JNZ,……
CMP AL,3
if AL=2
Z=0,C=1,A=1,S=1,P=1,O=0
if AL=3
Z=1,C=0,A=0,S=0,P=1,O=0
if AL=4
Z=0,C=0,A=0,S=0,P=0,O=0
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10. Multiplication and Division
The MUL (unsigned) and IMUL (signed) instructions exist to perform 8-, 16-, or 32-bit multiplication.
The result is always a double-width result.
2n*2n=22n
The carry and overflow bits indicate conditions about the multiplication.
For 8-bit multiplication, if most-significant 8-bits of the result are zero, then C=0 and O=0
So does the 16/32-bit multiplication
MOV AL, 03H
MUL BL
MUL 0F0H is illegal. But you can place the immediate in register to accomplish the multiplication.
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11. Multiplication and Division
8-bit multiplication
The Multiplicand is AL, so only one operand exists.
The Multiplier can be 8-bit register or memory location
Normally, the immediate multiplication is not allowed.
The result is placed in AX
16-bit
The result is placed in DX-AX
32-bit
The result is placed in EDX-EAX
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12. Multiplication and Division
The DIV (unsigned) and IDIV (signed) instruction exist to perform division on 8-, 16-, or 32-bit numbers.
Division is always performed on a double wide dividend.
The result is always in the form of an integer quotient and an integer remainder.
The dividend
8-bit, AX;
16-bit, DX-AX;
32-bit, EDX-EAX
The quotient and remainder
8-bit, AL(quotient),AH(remainder);
16-bit, AX(quotient),DX(remainder);
32-bit, EAX(quotient),EDX(remainder)
For signed division, the sign of the remainder is same as the dividend
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13. Multiplication and Division
The errors in division
An attempt to divide by zero
A divide overflow
A small number divides into a large number
Extended function
Unsigned number, zero-extended
MOVZX
assign AH, DX, EDA to zero
Signed number, sign-extended
CBW, CWD
MOVSX
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14. BCD and ASCII Arithmetic
BCD Arithmetic
Operate with BCD data, used to correct the BCD addition/subtraction
DAA, (decimal adjust after addition)
DAS, (decimal adjust after subtraction)
Function only with AL register
Example 5-18, 5-19
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15. BCD and ASCII Arithmetic
Function with ASCII-coded number, ranged from 30H to 39H
Use AX as the source and destination register
AAA, (ASCII adjust after addition)
Packed BCD number unpacked BCD number
AAS, (ASCII adjust after subtraction)
AAM, (ASCII adjust after multiplication)
Binary number
Binary number  unpacked BCD number
Example 5-23
AAD, (ASCII adjust before division)
Dividend, unpacked BCD number
Divisor, binary number
Unpacked BCD number  binary number
Example 5-21
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16. Basic Logic Instructions
Logic operations always clear the carry and overflow flags
AND
The AND instruction performs logical multiplication (the AND operation).
Use MASK to clear some bits
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17. Basic Logic InstructionsOR
The OR instruction generates the logical sum (OR operation).
Use MASK to set some bits
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18. Basic Logic Instructions
Exclusive OR
The XOR instruction performs the Exclusive OR operation.
Use MASK to invert some bits
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19. Basic Logic Instructions
Test and Bit Test Instructions
Bitwise operation, no result, operate as AND operation
Does not affect the destination operand
Only affect the flags, mainly the zero flags
Usually followed by the JZ/JNZ instructions
This instruction is often used to test multiple bits of a number.
Z=1 if result is zero
Z=0 for other results
TEST AL, 3 ;test the right two bits (if both are zero the result is zero)
Compare to CMP instruction
TEST  AND mode
CMP  SUB mode
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20. Basic Logic Instructions
Bit Test Instructions
There are four bit test instructions BT (bit test), BTR (bit test and reset), BTS (bit test and set), and BTC (bit test and complement).
Each tests the prescribed bit by moving it into carry. Then the bit is modified (except for BT)
BT AL,3 ;bit 3 is moved to carry
BTS AL,3 ;bit 3 is moved to carry then set
BTR AL,3 ;bit 3 is moved to carry then reset
BTC AL,3 ;bit 3 is moved to carry then inverted.
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21. Basic Logic Instructions
NEG and NOT
The NEG (negate) instruction 2’s complements a number,
The NOT instruction 1’s complements a number.
NOT EAX
NEG DWORD PTR [EBX]
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22. Shift and Rotate
Shift
There are 4 shift instructions. Two are logical shifts and two are arithmetic shifts.
The logical shifts reposition the bits in a number. The arithmetic shifts multiply or divide signed numbers by powers of two.
SHR and SHL are logical shifts
Move 0 into the rightmost/leftmost bit position
SAR and SAL are arithmetic shifts.
Move 0 into the rightmost position
Move sign bit into the leftmost position
SHL AL,3 or SHL AL,CL
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23. Shift and Rotate Rotate
Rotates are shifts that re-circulate the bit that moves out of an end of the register or memory location.
Four rotates exist where two just rotate the target and two rotate the target through the carry flag.
ROL AL,3 or RCL AL,3
Example 5-32
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24. Bit Scan Instructions Two forms
BSF (bit scan forward)
BSR (bit scan reverse)
Does not shift or rotate numbers, just scan through a number searching for a 1-bit
Affect the zero flag
Found, Z=1
Not found, Z=0
If EAX= H
BSF EBX, EAX ;EBX=29, Z=1
BSR EBX,EAX ;EBX=30, Z=1
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25. String Comparison
The SCAS and CMPS instruction perform comparisons on blocks of data.
SCAS compares a memory block to the accumulator and CMPS compares two blocks of memory.
SCASB, SCASW, and SCASD are available for 8-, 16-, and 32-bit comparisons as are CMPSB, CMPSW, and CMPSD.
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26. String Comparison
SCAS is often used to search for a value and CMPS is often used to compare two blocks.
Both instruction change the flags to indicate the outcome of the comparison.
The Direction flag determines whether the pointer increments or decrements.
REPE and REPNE are often used to repeat the SCAS or CMPS instructions.
Example 5-33, 5-34
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27. LODS,STOS
Example
Initializing a block of memory with a store string instruction
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28. REP string
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29. Example
Initializing a block of memory by repeating the STOS instruction
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30. String Direction
CLD/STD
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31. Example
Question
Describe what happens as the following sequence of instructions is executed
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32. Homework
第一部分
1,4,12,26,33,44
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