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V. Tocut, LAL/IN2P3 Orsay H. Lebbolo LPNHE/IN2P3 Paris
1 LPNHE PId Front End Chip: PIF V. Tocut, LAL/IN2P3 Orsay H. Lebbolo LPNHE/IN2P3 Paris
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H. Lebbolo – V. Tocut, SuperB Workshop, Frascati 09/2010
Requirement reminder Time measurement : 100ps resolution max 1MHz background rate max 50ns double pulse resolution min Charge measurement : (PM monitoring & barycentre) necessary ? yes dynamic range ? ~10 to 20 fine or coarse ? bit dedicated runs ? always H. Lebbolo – V. Tocut, SuperB Workshop, Frascati 09/2010
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H. Lebbolo – V. Tocut, SuperB Workshop, Frascati 09/2010
Charge Measurement Charge measurements will improve the resolution H. Lebbolo – V. Tocut, SuperB Workshop, Frascati 09/2010
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Proposal #1: Babar like ‘CFD’ like *16 Charge measurement To ADC IN
Low walk discriminator To TDC H. Lebbolo – V. Tocut, SuperB Workshop, Frascati 09/2010
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H. Lebbolo – V. Tocut, SuperB Workshop, Frascati 09/2010
Proposal #1: In00 Charge Amplifier Sample & Hold Mux Charge output (To ADC) Synchronization with TDC data State Machine Pseudo CFD To TDC H. Lebbolo – V. Tocut, SuperB Workshop, Frascati 09/2010
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H. Lebbolo – V. Tocut, SuperB Workshop, Frascati 09/2010
CFD Integration Fast comparator Fast comparator Classical CFD Proposed pseudo CFD Delay + Fraction Gain + Integrators H. Lebbolo – V. Tocut, SuperB Workshop, Frascati 09/2010
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H. Lebbolo – V. Tocut, SuperB Workshop, Frascati 09/2010
Spice Simulations H. Lebbolo – V. Tocut, SuperB Workshop, Frascati 09/2010
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Prop. #1: Babar like (cfd)
+++ No walk correction if walk < 50ps (depending on PM dynamics) Charge measurement to improve resolution --- Need « Time + charge » data synchronization No PM waveform signal monitoring 2 different chips developed: analog front end -> {PIF }: CFD like and charge measurement time measurement -> {SCATS} H. Lebbolo – V. Tocut, SuperB Workshop, Frascati 09/2010
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Prop. #2: charge + waveform
*16 Charge measurement MUX + S/H To ADC Fast Amplifier IN 16 Low walk discriminator To TDC No waveform monitoring needed !! H. Lebbolo – V. Tocut, SuperB Workshop, Frascati 09/2010
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Proposal #3: Time over Threshold (TOT)
SCATS To FPGA IN 8 16 ∆t = f(Q) TOT not enough accurate H. Lebbolo – V. Tocut, SuperB Workshop, Frascati 09/2010
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H. Lebbolo – V. Tocut, SuperB Workshop, Frascati 09/2010
Milestones PIF the Chip : first simulations with CMOS Ams 0.35µ or CMOS XFAB 0.18µm (NDA just signed) H. Lebbolo – V. Tocut, SuperB Workshop, Frascati 09/2010
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