1. Team Awesome += 5 PICo Design Presentation
Douglas Grosvenor, Terence Crumbley, Jeffrey Gaither

2. Overview
Background
Design
Testing
Metrics
Questions

3. Background PICo SRAM Low power High speed 1 Mb Long lifetime
Metric: (Total Power)^2 * Delay * Area
High speed
64 kb
Encryption/Compression
Metric: (Total Power) * Delay^2 * Area

4. Design 32bit words 2 words per row 64 rows per block
4096 bits per block
16 blocks array

5. Array Diagram

6. Block Diagram

7. Bitcell Layout

8. Design Cont’ Read/Write Signal System Pulse Generator WL Generator
Decoder

9. Read/Write Signal System

10. Pulse Generator

11. Pulse Signal
Blue – Input signal
Orange – Output signal

12. Word Line Generator

13. 6 to 64 Decoder

14. Testing Approach One Approach Two Corner Simulation
Four Bitcells RC
Based on extracted layout
Approach Two
Full word, read/write
Active/Inactive
Different words

15. Simulation of Read/Write

16. Analysis Metrics Area*(Delay^2)*Power Delay Power Area metric
1.75e11 mW*ns2*µm2
bitcell area
218.4µm2
total area
28M µm2
read power
111.43mW
write power
72.39mW
total power mW
read delay
5.5ns
write delay
2.5ns
total delay

17. Conclusion
Background
Design
Testing
Metrics

18. Questions?

19. Sense Amp

20. 2 to 4 Decoder

21. 2 to 4 Enable Dec.

22. Bitcell

23. Simulation

24. Simulation cont’d

25. Simulation cont’d

26. Problems
Sense Amp
Wiring problems