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Instructor: Alexander Stoytchev
CprE 281: Digital Logic Instructor: Alexander Stoytchev
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Design Examples CprE 281: Digital Logic
Iowa State University, Ames, IA Copyright © Alexander Stoytchev
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Administrative Stuff HW3 is out It is due on Monday Sep 16 @ 4pm.
Please write clearly on the first page (in block capital letters) the following three things: Your First and Last Name Your Student ID Number Your Lab Section Letter
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Quick Review
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The Three Basic Logic Gates
x 1 2 × x 1 2 + x NOT gate AND gate OR gate You can build any circuit using only these three gates [ Figure 2.8 from the textbook ]
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Figure B.21. A 7400-series chip. (a) Dual-inline package V Gnd
DD Gnd (b) Structure of 7404 chip Figure B A 7400-series chip.
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Figure B.22. An implementation of f = x1x2 + x2x3.
V DD x 1 2 3 f 7404 7408 7432
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NAND Gate x1 x2 f 1
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NOR Gate x1 x2 f 1
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AND followed by NOT = NAND
x 1 2 × x 1 2 × x1 x2 f 1 f 1 x1 x2 f 1
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NAND followed by NOT = AND
x 1 2 × x 1 2 × x 1 2 × x 1 x 2 x1 x2 f 1 f 1 x1 x2 f 1
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OR followed by NOT = NOR x 1 2 + x1 x2 f 1 f 1 x1 x2 f 1
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NOR followed by NOT = OR x 1 2 + x 1 2 + x1 x2 f 1 f 1 x1 x2 f 1
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Why do we need two more gates?
They can be implemented with fewer transistors. (more about this later)
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Building a NOT Gate with NAND
x x x f 1 x 1 impossible combinations Thus, the two truth tables are equal!
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Building an AND gate with NAND gates
[
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Building an OR gate with NAND gates
[
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Any Boolean function can be implemented
Implications Any Boolean function can be implemented with only NAND gates!
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Implications Any Boolean function can be implemented
with only NAND gates! The same is also true for NOR gates!
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Another Synthesis Example
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Truth table for a three-way light control
[ Figure 2.31 from the textbook ]
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Minterms and Maxterms (with three variables)
[ Figure 2.22 from the textbook ]
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Let’s Derive the SOP form
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Let’s Derive the SOP form
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Sum-of-products realization
x1 x3 x2 [ Figure 2.32a from the textbook ]
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Let’s Derive the POS form
[ Figure 2.31 from the textbook ]
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Let’s Derive the POS form
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Product-of-sums realization
x3 x1 x2 [ Figure 2.32b from the textbook ]
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Multiplexers
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2-1 Multiplexer (Definition)
Has two inputs: x1 and x2 Also has another input line s If s=0, then the output is equal to x1 If s=1, then the output is equal to x2
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Graphical Symbol for a 2-1 Multiplexer
[ Figure 2.33c from the textbook ]
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Truth Table for a 2-1 Multiplexer
[ Figure 2.33a from the textbook ]
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Let’s Derive the SOP form
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Let’s Derive the SOP form
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Let’s Derive the SOP form
Where should we put the negation signs? s x1 x2 s x1 x2 s x1 x2 s x1 x2
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Let’s Derive the SOP form
s x1 x2 s x1 x2 s x1 x2 s x1 x2
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Let’s Derive the SOP form
s x1 x2 s x1 x2 s x1 x2 s x1 x2 f (s, x1, x2) = s x1 x2 +
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Let’s simplify this expression
f (s, x1, x2) = s x1 x2 +
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Let’s simplify this expression
f (s, x1, x2) = s x1 x2 + f (s, x1, x2) = s x1 (x2 + x2) s (x1 +x1 )x2 +
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Let’s simplify this expression
f (s, x1, x2) = s x1 x2 + f (s, x1, x2) = s x1 (x2 + x2) s (x1 +x1 )x2 + f (s, x1, x2) = s x1 s x2 +
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Circuit for 2-1 Multiplexer
s (c) Graphical symbol (b) Circuit [ Figure 2.33b-c from the textbook ]
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More Compact Truth-Table Representation
1 (a) Truth table s x1 x2 f (s, x1, x2) 1 f (s, x1, x2) s x1 x2 [ Figure 2.33 from the textbook ]
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4-1 Multiplexer (Definition)
Has four inputs: w0 , w1, w2, w3 Also has two select lines: s1 and s0 If s1=0 and s0=0, then the output f is equal to w0 If s1=0 and s0=1, then the output f is equal to w1 If s1=1 and s0=0, then the output f is equal to w2 If s1=1 and s0=1, then the output f is equal to w3
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4-1 Multiplexer (Definition)
Has four inputs: w0 , w1, w2, w3 Also has two select lines: s1 and s0 If s1=0 and s0=0, then the output f is equal to w0 If s1=0 and s0=1, then the output f is equal to w1 If s1=1 and s0=0, then the output f is equal to w2 If s1=1 and s0=1, then the output f is equal to w3 We’ll talk more about this when we get to chapter 4, but here is a quick preview.
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Graphical Symbol and Truth Table
[ Figure 4.2a-b from the textbook ]
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The long-form truth table
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The long-form truth table
[
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4-1 Multiplexer (SOP circuit)
[ Figure 4.2c from the textbook ]
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Using three 2-to-1 multiplexers to build one 4-to-1 multiplexer
w w 1 1 f 1 w 2 w 3 1 [ Figure 4.3 from the textbook ]
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Using three 2-to-1 multiplexers to build one 4-to-1 multiplexer
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Using three 2-to-1 multiplexers to build one 4-to-1 multiplexer
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Using three 2-to-1 multiplexers to build one 4-to-1 multiplexer
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Using three 2-to-1 multiplexers to build one 4-to-1 multiplexer
w0 w1 s1 f s0 w2 w3
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That is different from the SOP form of the 4-1 multiplexer shown below, which uses less gates
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16-1 Multiplexer s f w [ Figure 4.4 from the textbook ] 1 3 4 2 7 8 11
3 4 7 12 15 2 f [ Figure 4.4 from the textbook ]
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Display of numbers [ Figure 2.34 from the textbook ]
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Display of numbers
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Display of numbers a = s0 c = s1 e = s0 g = s1 s0 f = s1 s0 d = s0
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Questions?
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THE END
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