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Data Stack and Return Stack

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1 Data Stack and Return Stack
T1: Combinational Logic Circuits Data Stack and Return Stack Lab 6 R. E. Haskell © 2001 Richard E. Haskell and Darrin M. Hanna

2 A 32 x 16 Stack

3 A 32 x 16 Stack Module

4 stack_ctrl32 wr_addr rd_addr 00000 11111 entity stack_ctrl is port (
clr: in STD_LOGIC; clk: in STD_LOGIC; push: in STD_LOGIC; pop: in STD_LOGIC; we: out STD_LOGIC; amsel: out STD_LOGIC; wr_addr: out STD_LOGIC_VECTOR (4 downto 0); rd_addr: out STD_LOGIC_VECTOR (4 downto 0); full: out STD_LOGIC; empty: out STD_LOGIC ); end stack_ctrl; 00000 wr_addr rd_addr 11111

5 stack_ctrl32 architecture stack_ctrl_arch of stack_ctrl is
architecture stack_ctrl_arch of stack_ctrl is signal full_flag, empty_flag: STD_LOGIC; begin stk: process(clr, clk, push, pop, full_flag, empty_flag) variable push_addr, pop_addr: STD_LOGIC_VECTOR(3 downto 0); if clr = '1' then push_addr := "1111"; pop_addr := "0000"; empty_flag <= '1'; full_flag <= '0'; wr_addr <= "1111"; rd_addr <= "0000"; full <= full_flag; empty <= empty_flag;

6 stack_ctrl32 wr_addr rd_addr 00000 elsif clk'event and clk = '1' then
11111 rd_addr wr_addr elsif clk'event and clk = '1' then if push = '1' then if pop = ‘0' then if full_flag = '0' then push_addr := push_addr - 1; pop_addr := push_addr + 1; empty_flag <= '0'; if push_addr = "11111” then full_flag <= '1'; push_addr := "00000"; end if; else –- write to top of stack (pop_addr) without pushing -- don’t change push_addr and pop_addr

7 stack_ctrl32 wr_addr rd_addr elsif pop = '1' then 00000
if empty_flag = '0' then pop_addr := pop_addr + 1; if full_flag = '0' then push_addr := push_addr + 1; end if; full_flag <= '0'; if pop_addr = "00000" then empty_flag <= '1'; wr_addr <= push_addr; rd_addr <= pop_addr; 00000 11111 rd_addr wr_addr

8 stack_ctrl wr_addr rd_addr 00000 full <= full_flag;
11111 rd_addr wr_addr full <= full_flag; empty <= empty_flag; if push = '1' and full_flag = '0' then we <= '1'; else we <= '0'; end if; if push = '1' and pop = ‘1' then amsel <= '1'; amsel <= '0'; end process stk; end stack_ctrl_arch;

9 A 32 x 16 Stack Module

10 Data Stack

11 Return Stack


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