1. Field Effect Transistor
ELECTRONIC DEVICE
Course Code: EET 109
Chapter 6:
Field Effect Transistor
(FETs)

2. OVERVIEW Introduction of Field Effect Transistor (FET) JFET MOSFET
Operation of JFET
Characteristic of JFET
Parameter of JFET
Analyzed How JFETs are Biased
Operation of MOSFET
Characteristic of MOSFET
Parameter of MOSFET
Analyzed How MOSFETs are Biased
Troubleshoot FET circuit
Junction Field Effect Transistor (JFET)
N channel
P channel
Metal Oxide Semi conductor Field Effect Transistor (MOSFET) E D

3. OVERVIEW (JFET) Transistor Bi-Polar Junction Transistor ( BJT)
Field Effect Transistor
(FET)
Junction Field Effect Transistor
(JFET)
Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
A transistor is a semiconductor device used to amplify or switch electronic signals and electrical power
n channel
p channel
D-MOSFET
n channel
p channel
E-MOSFET
n channel
p channel

4. WHY TRANSISTOR IS VERY IMPORTANT IN
OUR TECHNOLOGY?

5. VS Introduction BJT FET Unipolar devices
Bipolar Device used both electron and hole current.
Current controlled device (Ic,Ib,Ie)
FET
Unipolar devices
Operate only with one type of charger carrier.
It is a voltage controlled device(Vgs,Vds).
Advantages:
FET is very high input resistance.
In switching applications, FET is faster than BJTs when turned on and off. VS

6. Introduction- FET FET is a "Unipolar" device
that depends only on the conduction
of electrons (N-channel) or holes
(P-channel).
FET – a three-terminal voltage-
controlled device used in
amplification and switching
Application.
FET is a voltage-controlled device.
FET high input resistance. It
very sensitive to input voltage signals, and easily damaged by static electricity.

7. JFET n channel p channel JFET Basic Structure Characteristics
Parameters
Biasing

8. JFET- Basic Structure
The terminals of a JFET are the Source (S), Gate (G), and Drain (D).
A JFET can be either p channel or n channel.
The arrow on the gate points “in” for n channel & “out” for p channel.
These are the schematic symbol for both n channel n p channel JFETs .
Notice that,
JFET Schematic Symbol

9. JFET – Basic Operation ( DC Biasing to n channel)
VDD provide a drain-to-source voltage and
supplies current from Drain to Source (VDS)
VGG sets the reverse-bias voltage between gate
and source, (VGS).
JFET is always operated with gate-source(GS)
pn-junction reverse-biased.
GS junction never allowed to become
forward-biased because the gate material is
not designed to handle any significant amount
of current.
 it may destroy the component.

10. (Transfer Characteristic Curve)
JFET
Basic Structure
Characteristics
DCC
(Drain Characteristic Curve)
X -Axis: VDS (V)
Y-Axis: IDS (mA)
Vgs= 0
Vgs= -ve
Data Sheet
1) Typ
2) Max
3)Min
TCC
(Transfer Characteristic Curve)
X -Axis: - Vgs (V)
Y-Axis: IDS (mA
Equation:
Parameters
Biasing

11. JFET Characteristic: Drain Characteristic Curve (DCC)

12. JFET Characteristics: VGS=0
Case 1: When the gate-to-source voltage, VGS=0V.
Let’s first take a look at the effects with a VGS of 0V.
This is produced by shorting the gate to source junction.
Terminal Gate and Source, both are grounded.
This is produced by shorting the gate to source junction.
Terminal Gate and Source, both are grounded.
The characteristic of JFET need to be explain deeply by using Drain
characteristic curve (DCC).

13. VGS=0 ( JFET Drain Characteristic Curve) ,DCC
Y axis ID Range: 0  IDSS unit: mA
X axis VDS Range: 0 ∞ unit: V
Point
Region
Description
A to B
Ohmic Region
ID increases proportionally with increases of VDD (VDS increases as VDD increases).
called the ohmic region VDS and ID are related by Ohm’s Law. B
Pinch-off Voltage, VP
The Curve level off.
ID becomes essentially constant. (VDS=Vp)
B to C
Constant current
(Active Region)
ID still constant.
Because, as VDS ↑, the reverse-bias voltage from gate to drain (VGD) produces a depletion region large enough to offset the increase in VDS.
This current is called maximum drain current (IDSS) . C
Breakdown .
Breakdown occur when ID begins to increase rapidly with any increase in VDS.
Can caused irreversible damage the to the device.
so JFETs operation is always well below this value.
This is the DRAIN CHARACTERISTIC CURVE,DCC of case 1 VGS=0.
The axis of this graph are ID for y axis n VDS for x axis.
Refer to JFET drain curve from point A to B - ID increases proportionally with increases of VDD (VDS increases as VDD increases). This is called the ohmic region
(point A to B) because VDS and ID are related by Ohm’s Law.
At point B the curve levels off and ID becomes constant. The point when ID ceases to increase regardless of VDD increases is called the pinch-off voltage, VP (point B).
At point B-C This area is called constant-current area. This current is called maximum drain current (IDSS) and always specified for the condition, VGS=0V..
Breakdown (point C) occur when ID begins to increase rapidly with any increase in VDS. This of course undesirable, so JFETs operation is always well below this value.

14. VGS = - ve ( JFET Drain Characteristic Curve) ,DCC
Case 2 : As VGS is set to more – ve value by adjusting VGG
VGS is set to increasingly more
negative by adjusting VGG become
-1V.
Therefore the value of VGS become = -1V.
A Drain Characteristic Curves is produced.
Lets connect bias voltage, VGG from gate to source as shown.
We set by increase the value off VGG, become – 1V.
I have mentioned before that the Gate terminal need to apply reverse voltage to prevent the device from damage.

15. VGS = - ve ( JFET Drain Characteristic Curve) ,DCC
As VGS is set to more negative values by adjusting VGG, the ID becomes decrease because of the narrowing of the channel.
VGS =0 and Vp is benchmark point.
For each increasing in negative value of VGS the JFET reaches of their own pinch-off point (where the point of current constant begins) .
This values must less than Vp for VGS= 0.
From the
From this set of curves you can see with increased voltage applied to the gate, ID decrease and JFET reaches pinch-off at values of VDS less than VP.
VGS is set to increasingly more
negative by adjusting VGG.

16. JFET Characteristics : Cutoff Voltage, VGS (off)
The value of VGS will be given in Data Sheet.
The value of VGS that makes ID approximately zero is called Cutoff voltage, VGS(off) .
When VGS(off) (a very large –ve value), ID ≈ 0.
When VGS=0, ID= maximum IDSS.
The JFET must be operated between VGS=0 and VGS(off).
Pinch-off voltage (Vp) and cutoff voltage (VGS(off)) are both the same value, but opposite in sign.
Example: VGS(off) = -5V, then VP = +5V.
The operating limits of JFET are:
ID≈0
VGS=VGS(off)
ID=IDSS
VGS = 0

17. Draw and explain each point of Drain Characteristic Curve (DCC). Hint:
POP QUIZ 1 - SUBMIT
Draw and explain each point of Drain
Characteristic Curve (DCC).
Hint:
Axis/unit
Point A,B,C.(Name the region).
Point & Value Pinch off voltage ,Vp.
Point & Value Cutoff voltage, Vgs(off).

18. JFET Characteristics ( n vs p channel)
N -channel
P -channel
The basic operation of P-channel JFET is the same as for an
n- channel device except:
P-channel JFET requires a negative VDD and positive VGS
For p-channel, VGS(off) is positive and for n-channel JFET,
VGS(off) is negative

19. POP- QUIZ 2- SUBMIT
For the JFET in Figure below, given VGS(off) = -4V and IDSS =12mA. Determine minimum value of VDD required to put the device in the constant-current region of operation when VGS = 0V. Draw the complete DCC for this JFET.
Solution:
1) Identify type of channel ( n or p type)?
2)List out all the info given:
Lets we do it together….
VGS(off) = -4V
VGS = 0V (constant region)
IDSS = 12mA
𝑉 𝐷𝐷 =??

20. TAKE HOME QUIZ 1
Q) A particular n-channel JFET has a VGS(off)= - 5V and IDSS= 10mA
a) Draw the complete DCC of the JFET.
b) What is Vp for the JFET ?
c) What is ID when VGS= -7V?

21. SUMMARY of DCC
The range of VGS values from zero to VGS(off)  controls the amount of ID .
For n channel JFET VGS(off) is negative.
For p channel JFET VGS(off) is positive.
So that, the relationship between ID and VGS is very importance.
For DCC show value of VGS.
Y AXIS unit:
X AXIS unit:
Equation involved 

22. JFET Characteristics :Transfer Characteristics Curve,TCC
TCC will show the value of ID at certain value of VGS .
A JFET transfer characteristic curve is expressed approximately as:
(Square Law)
ID can be determined for any VGS if VGS(off) and IDSS are known.
VGS(off) and IDSS are usually available from the JFET datasheet.
Transfer Characteristic Curve,TCC
Notice that the bottom end of the curve is at a point on the Vgs axis is vgs off.
The top end of the curve is at a point on the axis equal to IDSS.
Before this the DCC will show the value of voltage ,VGS, for TC it will show the value of current Id on that particular vgs.
Y axis ID Range: 0  IDSS unit: mA
X axis -VGS Range: 0 VGS(off) unit: V

23. Transfer characteristic curve (blue) can be developed from Drain characteristic curves (green) by plotting values of ID for the values of VGS taken from drain curves at pinch-off, Vp.
The transfer characteristic curve illustrates the control VGS has on ID from cutoff (VGS(off) ) to pinchoff (VP). Note the parabolic shape. The formula below can be used to determine drain current. All these values are usually available from data sheet.
When VGS = - 2V, ID = 4.32mA.
When VGS = 0V, ID = IDSS = 12mA.

24. POP QUIZ 3 - SUBMIT
Q) Given IDSS of JFET n channel is 6mA and VGS(off)= -7V.
By using these values , determine the drain current, ID for
VGS=0V , VGS=-4V and VGS= -6V, VGS= -8V .
Then draw the TCC of the JFET.
When:
VGS = 0
ID = ?
VGS = -4V
VGS = -6V
VGS = -8V

25. DATA SHEET

26. POP-QUIZ 4 - SUBMIT
The partial datasheet below for a 2N5459 JFET indicates that typically IDSS = 9mA and VGS(off) = -8V (maximum). Using these values, determine the drain current for VGS = 0V, -1V and -4V and draw the Transfer characteristic Curve (TCC) and Drain Characteristic Curve (DCC).
Min
Typ
Max
Units
Typ==typically used
Empty column , we need to used the max value

27. TAKE HOME QUIZ 2
Q4) Determine ID for VGS = -1V,-2V, -3 V,-4V and -5 V for the 2N5457& 2N5458 JFET. Then draw Transfer Characteristic Curve and Drain Characteristic Curve for both JFET.
Solution:
From datasheet: IDSS =??, VGS(off) = ??
VGS = -1V, ID = ??
VGS = -2V, ID = ??
VGS = -3V, ID = ??
VGS = -4V, ID = ??
VGS = -5V, ID =??

28. SUMMARY OF TTC Y AXIS ID Range: 0  IDSS unit: mA
X AXIS -VGS Range: 0 VGS(off) unit: V
Equation involved 
Square Law

29. Forward Transconductance,gm
JFET
Basic Structure
Characteristics
Parameters
Forward Transconductance,gm
Input Resistance,Rin
Biasing

30. JFET Parameters: Forward Transconductance
Forward Transfer Conductance, gm is the changes in drain current (ΔID) based on changes in gate-to-source voltage (ΔVGS) with VDS is constant.
The value is larger at the top of the curve (near VGS=0) but become smaller as you increase VGS (near VGS(off)).
-Input resistance for a JFET is high since the gate -source junction is reverse biased, however the capacitive effects can offset this advantage particularly at high frequencies.
-The value is larger at the top of the curve (near VGS=0) but become smaller as you increase VGS (near VGS(off)).

31. A data sheet normally gives the value gfs, and then we can calculate an approximate value for gm using at any point on the transfer characteristic curve by using:
Unit: Siemens (S)
When the value of gm0 is not available in data sheet , it can be calculate using this formula:

32. POP-QUIZ 5
Q5) By refering data sheet for a 2N5457 JFET. Determine transconductance for VGS = -4V and find ID at this point.

33. JFET Parameters : Input Resistance, Rin
Since JFET operates with GS-junction reverse-biased for operation , which makes the input resistance (Rin) becomes so large at the gate.
This high input resistance is one advantage of using JFET over BJT.
This input resistance Rin can be calculated at different VGS using :
Where:
IGSS = Gate Reverse Current (if not given refer data sheet)
The value of input resistance is absolute value (no sign).
Looking at the datasheet, you may calculate the resistance value by using the Gate Reverse Current IGSS
Absolute value" means to remove any negative sign in front of a number, and to think of all numbers as positive (or zero).

34. POP- QUIZ 6
Calculate input resistance, RIN if IGSS= -2nA and VGS= -20V
Solution:
absolute value" means to remove any negative sign in front of a number, and to think of all numbers as positive (or zero).

35. TAKE HOME QUIZ 3 Q7) For a 2N5459 JFET ,determine the forward
transconductance, drain current and input resistance
for VGS= -7V if IGSS= -2nA.
absolute value" means to remove any negative sign in front of a number, and to think of all numbers as positive (or zero).

36. 3) Advantage & Disadvantage
JFET
Basic Structure
Characteristics
Parameters
Biasing
Self- Bias
Mid point Bias
Gate Bias
1) Circuit
2) Q point
3) Advantage & Disadvantage
Voltage Divider Bias
Current Source Bias
6.3. JFET Biasing
Just as we learned the JFET also must be biased for operation.
Let’s look at some of the methods for biasing JFETs
In most cases the ideal Q-point will be the middle of the transfer characteristic curve which is about half of the IDSS.

37. Advantages& Disadvantages
JFET
Bias Circuit
Self-Bias
Circuit
Is = ID
Q point
(VGS,ID)
Advantages& Disadvantages
Mid point Bias
Gate Bias
Voltage Divider Bias
Current Source Bias
SELF- BIAS

38. JFET Biasing- 1) Self bias
Self-bias is the most common type of biasing method for JFETs.
JFET must be operated such that the gate-source junction is always reverse biased.
To keep the GS-junction reverse biased:
(a). VGS will be -ve for n-channel JFET (b). VGS will be +ve for p-channel JFET.
It can be achieved using self-bias arrangement as shown in figure below.
The gate resistor,RG : not affect the bias because it has essentially no volt drop across it.
Therefore, the gate remains 0V.
RG only to force the gate to be 0V and isolate an
ac signal from ground in amplifier applications.
Self-biased JFETs:
ID = IS for all JFET circuits
Self-bias is the most common type of biasing method for JFETs.
Notice there is no voltage applied to the gate, VG=0V.
However, the voltage from gate to source (VGS) will be negative for n channel and positive for p channel to keep the junction reverse biased.
Uses a source resistor to help reverse biase JFET gate. The gate is returned to ground via RG, and RS has been added to source circuit.
This voltage can be determined using the formulas below. ID = IS for all JFET circuits. VG=0 and VS=IDRS.

39. Since, IS = ID and VG = 0, VS = IDRS. So: VGS = VG – VS = 0 – IDRS
For n-channel JFET
IS through RS produces a voltage drop, making the Source +ve with respect to ground.
Since, IS = ID and VG = 0, VS = IDRS.
So: VGS = VG – VS = 0 – IDRS
(n channel) VGS = -IDRS
For p-channel JFET
IS through RS produces a –ve voltage at Source, making the Gate +ve with respect to ground.
Since, IS = ID, and VG = 0, -VS = –IDRS
VGS = VG – (– VS ) = 0 – (– IDRS)
(p channel) VGS = IDRS

40. + 𝑉 𝐷𝐷 − 𝐼 𝐷 𝑅 𝐷 − 𝑉 𝐷𝑆 − 𝑉 𝑆 =0 + 𝑉 𝐷𝐷 − 𝐼 𝐷 𝑅 𝐷 − 𝐼 𝐷 𝑅 𝑆 = 𝑉 𝐷𝑆
For the drain voltage (VD) with respect to ground is determined as follows:
KVL Drain to Source:
+ 𝑉 𝐷𝐷 − 𝐼 𝐷 𝑅 𝐷 − 𝑉 𝐷𝑆 − 𝑉 𝑆 =0
∴𝑉 𝑆 = 𝐼 𝐷 𝑅 𝑆
+ 𝑉 𝐷𝐷 − 𝐼 𝐷 𝑅 𝐷 − 𝐼 𝐷 𝑅 𝑆 = 𝑉 𝐷𝑆

41. POP- QUIZ 7
Find VDS and VGS if the drain current, ID of approximately 5mA is produced.

42. KVL Drain to Source:
KVL Gate to Source:

43. TAKE HOME QUIZ 4 Determine VD, VS, VDSand VGS when ID = 8mA. Ans:
VDS = 2 V
VGS = V

44. SELF- BIAS JFET Bias Circuit Self-Bias Circuit Is = ID Q point
Mid point Bias
Gate Bias
Voltage Divider Bias
Current Source Bias
Circuit
Is = ID
Q point
(VGS,ID)

45. Self bias - Q-Point (a) Transfer characteristic curve (b) Formula:
The basic approach to establishing a JFET bias point is to determine the ID for a desired value of VGS or vice versa.
For a desired value of VGS, ID can be determined from:
(a) Transfer characteristic curve
(b) Formula:
Then, calculate the required value of RS using the following relationship.

46. POP- QUIZ 8 ( Using Formula)
Determine the value of RS required to self bias a n channel JFET with IDSS = 10mA and VGS(off) = -15V. VGS is to be -5V.

47. POP- QUIZ 9(Using Transfer Characteristic Curve)
Determine the value of RS required to self bias a n channel JFET that has the transfer characteristic curve shown below at VGS= -5V.
Q point:
VGS= -5 V
ID= ??
ID (mA)
-VGS(V)

48. Self bias – Biasing-graphical Analysis
The Transfer characteristic curve of a JFET can be use to determine the Q point ( ID and VGS) of self bias circuit.
To determine the Q point:
Make a self-bias DC load line on the graph of Transfer Characteristic given.
First, establish dc load line by:
i) calculating VGS when ID=0.
ii) calculate VGS when ID=IDSS
With 2 points, draw dc load line on the transfer characteristic curve.
ID= 0
VGS=-IDRS
ID=IDSS.

49. POP- QUIZ 10
Determine the Q point for the JFET circuit below.

50. First, establish dc load line by:
i) calculating VGS when ID=0.
ii) calculate VGS when ID=IDSS
With 2 points, draw dc load line on the transfer characteristic curve.
ID= 0
VGS=-IDRS
= (0)(470Ω)
= 0 V
VGS = 0 V
ID=IDSS.
= (10mA)(470Ω)
= - 4.7V
VGS=- 4.7V

51. The point where the line intersect the transfer characteristic curve is the Q-point of the circuit.

52. TAKE HOME QUIZ 5 Determine the Q point for the JFET circuit below.
470Ω
280Ω
Determine the Q point for the JFET circuit below.
ID(mA)
-VGS

53. JFET Bias Circuit Voltage Divider Bias Mid point Bias
Self-Bias
Mid point Bias
Circuit
ID = 0.5IDSS
Q point
(VGS,ID)
Gate Bias
Voltage Divider Bias
Current Source Bias

54. Self bias – Midpoint Bias
Midpoint biasing – It is usually desirable to bias a JFET near the midpoint of its transfer characteristic curve (TCC) where ID = 0.5IDSS when VGS= VGS(off)/ 3.4.
Under signal condition, midpoint bias allows the max amount of drain current swing between 0 and IDSS.
Midpoint biasing
ID = 0.5IDSS
and
By selecting VGS = VGS(off) /3.4  should get a midpoint bias
in terms of ID .

55. To set the Drain Voltage (VD) at midpoint :
(to select a value of RD to produce the desired voltage drop.)
The value of RD needed can be determined by taking half of VDD and dividing it by ID:
RG, it’s value is arbitrarily large to prevent loading on the driving stage in a cascaded amplifier arrangement.

56. Midpoint biasing:
ID = 0.5IDSS

57. POP- QUIZ 11
By referring datasheet ( 2N5457 JFET) , select resistor value for RD and RS to set up an approximate midpoint bias. Use minimum datasheet values when given; otherwise, VD should be approximately 6V(one-half of VDD).

58. Solution:

59. JFET Bias Circuit Voltage Divider Bias Mid point Bias
Self-Bias
Mid point Bias
Gate Bias
Circuit
Voltage Divider Bias
Current Source Bias

60. JFET Biasing- 2) Gate- bias
Gate supply voltage (-VGG) is used to ensure GS-junction is reverse-biased.
Since there is no gate current (IG), there is no voltage dropped across RG.
So, VGS = -VGG.
RG  to prevent input signal from being shorted to gate supply through low reactance of input coupling capacitor.

61. To find ID:
Disadvantage
Gate bias does not provide a stable Q-point value of ID from one JFET to another.

62. JFET Bias Circuit Voltage Divider Bias Mid point Bias
Self-Bias
Mid point Bias
Gate Bias
Voltage Divider Bias
Circuit
Q point
(VGS,ID)
Current Source Bias

63. JFET Biasing- 3) Voltage-Divider bias
The voltage at source, VS of the JFET must be more +ve than the voltage at gate,VG in order to keep the GS-junction reverse bias. Since ID=IS.
Source voltage:
Gate voltage:
Gate-to-source voltage:
Drain current:
N channel JFET VDB

64. POP- QUIZ 12
Determine ID and VGS for the JFET with voltage divider bias below, given that for this particular JFET the parameter values are such that VD = 7V.

65. Solution:
Determine ID and VGS

66. Given that VD = 6V, determine the ID and VGS .
TAKE HOME QUIZ 6
Given that VD = 6V, determine the ID and VGS .
Ans:
ID = 2.353mA
VGS = V

67. Voltage Divider Bias – Biasing-graphical(Q point)
By using the transfer characteristic curve to determine the approximate Q-point, we must establish the two points for the DC load line.
1st point:
2nd point:
ID= 0
VGS=VG-VS
VS = ID RS = (0)(RS)
VGS=VG-VS = VG – 0= VG
VGS = VG
VGS=0
VGS=ID = VG - VGs = VG
RS RS
ID=VG
RS .

68. The point at which the DC load line intersect with transfer characteristic curve is Q-point.

69. POP- QUIZ 13 Determine the approximate Q-point for the JFET with the
voltage-divider bias below and also given the transfer characteristic
curve .

70. Solution: ID= 0 VGS=VG-VS VS = ID RS = (0)(RS) VGS=VG-VS = VG – 0= VG
ID = VG - VGs = VG
RS RS
ID=VG
RS .
1st point:
2nd point:
For 1st point:
2nd point:

71. ID= 0 VGS=VG VGS = VGS=0 ID = VG - VGs = VG RS RS ID=VG = RS . Ans:
1st point:
2nd point:
Ans:

72. TAKE HOME QUIZ 7
Determine the approximate Q-point for the JFET with the
voltage-divider bias below and also given the transfer characteristic
curve .
1.2kΩ

73. JFET Bias Circuit Voltage Divider Bias Mid point Bias
Self-Bias
Mid point Bias
Gate Bias
Voltage Divider Bias
Current Source Bias
Circuit

74. JFET Biasing- 3) Current Source - Bias
Current source bias: for increasing Q-point stability of self biased JFET by making value of ID independently of VGS
It can be accomplished by using constant current source in series with JFET source.
From figure, BJT acts as constant –current because IE is constant if VEE>>VBE.
FET also can be used as constant current source.
IE = VEE - VBE = VEE
RE RE
ID= IE ( ID remains constant for any transfer characteristic curve as indicated by the horizontal line
This is just as knowledge ...
From figure, BJT acts as constant –current because its emitter current is essentially constant if VEE>>VBE.
ID= IE

75. Advantage
provide the most stable Q-point value of ID.
Disadvantage
circuit complexity makes it undesirable for most applications.