1. Exploring Application Specific Programmable Logic Devices
Class 1: An Introduction to Application Specific Programmable Logic Devices
6/10/2013
Warren Miller

2. This Week’s Agenda
6/10/13 Introduction 6/11/13 Programmable Analog Pt 1 6/12/13 Programmable Analog Pt 2 & Timing 6/13/13 MCUs with Programmable Fabric 6/14/13 Programmable Devices with a New Twist

3. Class Description
Application specific programmable logic devices are not just for digital logic replacement:
Non-programmable functions, analog capabilities, timing circuits, etc.
This course will provide a detail overview of many of these new devices and will show specific examples of applications where these devices are being used today.

4. Today’s Topics Goals and Objectives
Traditional Programmable Logic Devices- CPLDs and FPGAs
Glue Logic
ASIC Replacement
Typical Applications
How to classify Application Specific PLDs?
Non-Traditional Programmable Logic Devices- add one or more of:
Fixed Function Application Specific Digital Hardware
Analog Blocks
Alternate Programming Technology
Devices and Families to be covered in future classes

5. Goals and Objectives
Understand, at the overview level, key concepts we will use in the rest of the class
Traditional Programmable Logic Devices
Technology Features and applications
Non-Traditional Programmable Logic Devices
Technology, features and applications
Types of application ‘problems’ not adequately addressed by traditional programmable logic devices

6. Traditional Programmable Logic Devices- CPLDs and FPGAs
Programmable Array
Interconnect Matrix
Flash
Low Capacity
Low Cost
FPGAs:
Configurable Look-up Tables
Programmable Interconnects
Switch Matrix
SRAM-based/Flash-based
High Capacity

7. PLDs PLDs: Programmable Array Full Interconnect One Time Programmable
Low Capacity
Low Cost
Software Easy
Architecture Difficult to Extend

8. CPLDs CPLDs: CMOS Technology Blocks of PLA/PAL
Programmable Interconnect
Low Capacity
Low Cost
Software More Difficult
Architecture Extendable
Note: Logic Tied to I/Os

9. FPGAs FPGAs: Look-up Tables for Logic Switched Interconnect
SRAM (typically)
High Capacity
High Cost
Software Very Difficult
Architecture Very Extendable
Easy to add Fixed Blocks

10. FPGAs
FPGAs:
Include some fixed functions to improve implementation of ‘real’ systems
Block Memory
Arithmetic Functions
Multiplier/MAC
Carry Chain
Clocking
PLLs
Buffers
Serial IO (SerDes)
Processors

11. Traditional Programmable Logic Devices- Example Applications
CPLDs
Glue Logic
Bridges
Timing Control and State machines
FPGAs
Complete Subsystems
Control, Data path, Serial communications, ALU, DSP, Memory Blocks, etc.

12. Classification System
Type of Programmable ‘Fabric’ (Fine grained to Coarse grained)
Gate
Mux
Programmable And/Or
LUT (4 input, fracturable, etc)
Programmable ALU
Plus: Processors, Memory, Carry, DSP, etc
Fixed Function Off-chip Interfaces
Low-Speed (I2C, SPI, UART, USB, etc)
High-Speed (Enet, Optical, etc)
AtoD, DtoA, High Voltage FETs, etc.
Memory (DDR2/3, NAND/NOR, etc)
Special Interfaces (Inter-chip communication)
Fixed Function On-chip Blocks
Timers, User Flash, Block Memory, PLLs, PWM, etc.
Analog (AtoD, DtoA)
Analog (Comparitors, Switches, etc)
Processors and Processor Support
I/D Memory, Cache, Internal Busses
DMA, Interrupt, Peripherals
Clocking, PLL, Debug Interfaces

13. Classification System: Low Capacity
Cypress: Programmable Clocks, XOs
Exar:
PowerXR
Lattice:
Platform Manager, Power Manager II, ispClock
Analog
Blocks
APLD
AcSoC
Digital
Blocks
ASPLD
cSoC
Lattice: MachXO2
Altera:
MAX
Lattice: MachXO
Generic
CPLD
FPGA
Low
Capacity
High
Capacity

14. Classification System: High Capacity
Analog
Blocks
APLD
AcSoC
Cypress: pSoC
Microsemi: SmartFusion,
Fusion (AFPGA)
Digital
Blocks
ASPLD
cSoC
Altera:
Arria, Cyclone
Microsemi: SmartFusion2
Xilinx:
Zynq
Generic
CPLD
FPGA
Altera: Stratix, Arria, Cyclone
Lattice: ECP3, SC, XP2,
iCE40
Microsemi: IGLOO,
ProASIC
Xilinx: Spartan, Virtex, Artix, Kintex
Low
Capacity
High
Capacity

15. Classification System
Analog
Blocks
APLD
AcSoC
Out of the Box Devices
Digital
Blocks
ASPLD
cSoC
Achronix
Tabula
Stretch
Generic
CPLD
FPGA
Low
Capacity
High
Capacity

16. Topics PSoC (Cypress) Prog Analog PSoC Power (Cypress) Prog Analog
Platform Manager (Lattice) Prog Analog
PowerXR (Exar) Prog Analog
Programmable Clocks (Cypress) Timing
ispClocks (Lattice) Timing
Programmable XOs (Cypress) Timing
Zynq (Xilinx) FPGA + MCU
Altera Arria V (Altera) FPGA + MCU
SmartFusion2(Microsemi) FPGA + MCU
Achronix FPGA
Stretch S6, S7 Configurable Processor
Tabula 3PLD

17. Additional Resources
All Programmable Planet: Max Maxfield: Bebop to the Boolean Boogie What is programmable Logic?

18. This Week’s Agenda
6/10/13 Introduction 6/11/13 Programmable Analog Pt 1 6/12/13 Programmable Analog Pt 2 & Timing 6/13/13 MCUs with Programmable Fabric 6/14/13 Programmable Devices with a New Twist