1. Simplified overview of the 2013 BEST field and gameplay By Ian Prester

3. Coat hangers and Wooden Posts Coat hangers and Wooden Posts CPU Slot s CPU Slot s Memory Slots Memory Slots Wooden Dowels And Cups Wooden Dowels And Cups 1 1 2 2 3 3 CPU Pieces CPU Pieces Memory Pieces Memory Pieces

4. Gameplay is seperated into three different areas this year 1: The first area is called transistor fabrication. – This is the multicolored wooden dowels and the cups in which they are to be placed 2: The second area is called IC (integrated circuit) fabrication. – This is the rack of multicolored coat hangers and the wooden posts with PVC pipes on which they are to be hung 3: The third area is called the CPU (Central Processing Unit) fabrication area. – This is the table in the middle of the playing field that has slots for the foam pieces on the floor to be placed in.

5. Objective In short the objective for the game is to build the best CPU (foam puzzle pieces in stage 3) possible. In order to build the CPU 1.Gates (dowels from stage 1)must be built 2.Integrated circuits (coat hangers from stage 2) must be built 3.ICs (foam pieces) are used in stage 3 to make the best CPU The scoring software will keep track of how many gates and ICs and CPUs have been made for each team during the entire competition No gates and no ICs means no CPU

6. Stage 1 Gate Fabrication (Dowels) This stage of the competition requires teams to take the wooden dowels (transistors) on the bottom rack and place them into the bins above Different bins account for different points Lower bins are worth half the points upper bins are White ends out mean half the points of red ends out NAND bins (the ones facing the other way are the same as far as points and gates as the upper bins

7. Gatekeeper Transistor Values --Gate Fabrication Area-- Gatekeeper Transistor Values --Gate Fabrication Area-- 24 transistors 48 transistors 48 transistors 96 transistors Transistor values for AND, OR and NOT gates Non-painted end Painted end Upper Assembly Line Lower Assembly Line

8. Transistor values for NAND gates Non-painted end Painted end 48 transistors 96 transistors Gatekeeper Transistor Values --Gate Fabrication Area--

9. # of Gates# of Transistors Point Value 1 AND Gate =24 transistors = 10 points 1 OR Gate =24 transistors= 10 points 1 NOT Gate =24 transistors= 10 points 1 NAND Gate =16 transistors = 8 points # of Gates# of Transistors Point Value 1 AND Gate =24 transistors = 10 points 1 OR Gate =24 transistors= 10 points 1 NOT Gate =24 transistors= 10 points 1 NAND Gate =16 transistors = 8 points Transistor Point Values --Gate Fabrication Area-- Transistor Point Values --Gate Fabrication Area-- Example #1 1 AND Gate 24 transistors 10 points Example #2 4 AND Gates 96 transistors 40 points

10. Gate TypeTransistors Required Per Gate AND24 OR24 NOT24 NAND16 The purpose of creating transistors is to be able to use them for gates in the second round Below is a table of how many transistors are required to create each type of gate that is required in stage 2 For example: if a team scores a dowel with red end out on the upper assembly line of the and section then they score 96 AND transistors. This translates into 4 AND gates (4 red hangers) that can be used in stage 2

11. Stage 2 Integrated Circuit Fabrication (Coat Hangers and posts) This stage of the competition requires teams to take gates (coat hangers) and place them on PVC pipes jutting from the wooden posts The purpose of this stage is to build the cpu pieces or ICs (foam pieces) needed for stage 3 Teams are only able to use the gates (dowels from stage 1) that they have already assembled (from previous or current rounds) Lower PVC pipes are half as fast as upper ones First tower is the MUX (Multiplexor) Second is the Adder Third is the Decoder Last is the D-Latch (Data Latch)

12. Building Integrated Circuits Gatekeeper: Clothes hangers represent gates. To build an integrated circuit, calculations must be made to determine the number and type of gates needed to create each circuit. Remember, inventory is required from Stage 1: Gate Fabrication Area. 1 Red hanger = 1 AND gate 1 White hanger = 1 OR gate 1 Blue hanger = 1 NOT gate 1 Black hanger = 1 NAND gate

13. IC Fabrication contd Hangers can be suspended by the PVC in any fashion as long as they are not supported by the field IC is only as efficient as lowest hanger. – For example, if a team was building a D-Latch (needing only two black hangers) and had one black hanger on the upper post and one on the lower post then the team would only receive one D-Latch gate. – If the team were to place both the black hangers on the upper post then they would receive two D-Latch gates since the upper post is running at double speed

14. AND OR NOT NAND Squares represent colored hangers and the number required to build each integrated circuit. Strategy will determine whether a team uses NAND gates or AND/OR/NOT gates. or AdderMUXDecoderD-Latch Register & Memory Units MUX Manufactured80 Points Each Adders Manufactured60 Points Each Decoders Manufactured40 Points Each D-Latches Manufactured60 Points Each IC Fabrication Scoring

15. Okay, this is a little confusing, no? Heres a little recap – Dowels in buckets = Transistors – Use table to know how many gates are produced from transistors – Gates (hangers) are used in stage 2 to produce the foam pieces needed in stage 3 for the CPU and memory MUX = Multiplexor (first tower) Adder = (Second tower) Decoder = Instruction/Address Decoder (Third tower) D-Latch = Register/Memory Unit (Fourth Tower) Okay, lets keep going Gate TypeTransistors Required Per Gate AND24 OR24 NOT24 NAND16

16. Stage 3 CPU Fabrication (Foam Puzzle Pieces) The purpose of this stage is to take the foam pieces (CPU and memory components) and place them on the board to make the best CPU and Memory possible The foam pieces are representations of the ICs made in stage 2 with the coat hangers and posts D-Latch = Register/Memory Unit Decoder = Instruction Decoder/Address Decoder Adder + MUX = ALU

18. The BEST CPU Fabrication Area The BEST CPU Fabrication Area consists of two sub-areas: Core Processor Area (located on the left) Memory Module Area (located on the right) The BEST CPU Fabrication Area consists of two sub-areas: Core Processor Area (located on the left) Memory Module Area (located on the right)

19. Fabricating a Core Processor (The square board on the left) A BEST Core Processor requires: (3) Registers (made by placing one D-Latch into each designated area) (1) Instruction Decoder (made by placing one Decoder into the designated area) (1) Arithmetic Logic Unit (ALU) (made by placing one MUX and one Adder into the designated areas A BEST Core Processor requires: (3) Registers (made by placing one D-Latch into each designated area) (1) Instruction Decoder (made by placing one Decoder into the designated area) (1) Arithmetic Logic Unit (ALU) (made by placing one MUX and one Adder into the designated areas

20. Fabricating a Memory Module (The rectangular board on the right) A BEST Memory Module is capable of fabricating two types of memory modules: 8-bit Memory Module (made by placing one D-Latch into any one of the Memory Unit slots) 32-bit Memory Module (made by placing four D-Latches and one Address Decoder the Memory Unit and Address Decoder slots) A BEST Memory Module is capable of fabricating two types of memory modules: 8-bit Memory Module (made by placing one D-Latch into any one of the Memory Unit slots) 32-bit Memory Module (made by placing four D-Latches and one Address Decoder the Memory Unit and Address Decoder slots)

21. CPU Fabrication Point Values --CPU Fabrication Area-- CPU Fabrication Point Values --CPU Fabrication Area-- Register installed 90 points Instruction Decoder installed 60 points MUX installed in ALU 120 points Adder installed in ALU 90 points 8-bit Memory Module completed90 points 32-bit Memory Module completed 420 points 8-bit CPU completed 512 points 32-bit CPU completed 1024 points Register installed 90 points Instruction Decoder installed 60 points MUX installed in ALU 120 points Adder installed in ALU 90 points 8-bit Memory Module completed90 points 32-bit Memory Module completed 420 points 8-bit CPU completed 512 points 32-bit CPU completed 1024 points

22. Inventory System Gatekeeper utilizes an inventory system that is independent from scoring values: Components fabricated in each stage are placed in a teams inventory This inventory is NOT represented physically, but is instead maintained by the BEST Scoring Software Hubs will provide a display for viewing team inventory, but it is HIGHLY RECOMMENDED THAT TEAMS TRACK THEIR OWN INVENTORY Gatekeeper utilizes an inventory system that is independent from scoring values: Components fabricated in each stage are placed in a teams inventory This inventory is NOT represented physically, but is instead maintained by the BEST Scoring Software Hubs will provide a display for viewing team inventory, but it is HIGHLY RECOMMENDED THAT TEAMS TRACK THEIR OWN INVENTORY

23. Scoring Overview

24. The 5S Bonus The 5S Bonus is awarded at the completion of each match for maintaining a clean and safe work environment: 5S Bonus is calculated at the end of each match but is not finalized until the end of the round 5S Bonus will be awarded at the end of a match, if no game pieces have been removed from play, and any game pieces in contact with the floor are also in contact with the robot The maximum 5S per round is 10% of the scored amount The 5S Bonus is awarded at the completion of each match for maintaining a clean and safe work environment: 5S Bonus is calculated at the end of each match but is not finalized until the end of the round 5S Bonus will be awarded at the end of a match, if no game pieces have been removed from play, and any game pieces in contact with the floor are also in contact with the robot The maximum 5S per round is 10% of the scored amount 1.Sort 2.Set in order 3.Shine 4.Standardize 5.Sustain

25. Good Luck! Please remember to read the rules FIRST. Any remaining questions can be addressed on the Official BEST Q&A!