1. Machine-Level Programming II: Basics Comp 21000: Introduction to Computer Organization & Systems
Instructor:
John Barr
* Modified slides from the book “Computer Systems: a Programmer’s Perspective”, Randy Bryant & David O’Hallaron, 2015

2. Machine Programming I: Basics
History of Intel processors and architectures
C, assembly, machine code
Assembly Basics: Registers, operands, move
Intro to x86-64

3. IS32/x86-64 Properties
Instruction can reference different operand types
Immediate, register, memory
Arithmetic operations can read/write memory
Memory reference can involve complex computation
Rb + S*Ri + D
Useful for arithmetic expressions, too
Instructions can have varying lengths
IA32 instructions can range from 1 to 15 bytes

4. Features of IA32 instructions
X86-64 instructions can be from 1 to 15 bytes.
More commonly used instructions are shorter
Instructions with fewer operands are shorter
Each instruction has an instruction format
Each instruction has a unique byte representation
i.e., instruction pushl %ebp has encoding 55
X86-64 started as a 16 bit language
So IA32 calls a 16-bit piece of data a “word”
A 32-bit piece of data is a “double word” or a “long word”
A 64-bit piece of data is a “quad word”

5. Assembly Programmer’s View (review)
Memory
CPU
Addresses
Registers
Object Code
Program Data
OS Data PC
Data
Condition
Codes
Instructions
Stack
Programmer-Visible State
PC: Program counter
Address of next instruction
Called “EIP” (IA32) or “RIP” (x86-64)
Register file
Heavily used program data
16 named locations, 64bit values (x86-64)
Condition codes
Store status information about most recent arithmetic operation
Used for conditional branching
Memory
Byte addressable array
Code, user data, (some) OS data
Includes stack used to support procedures

6. Instruction format
Assembly language instructions have a very rigid format
For most instructions the format is
movl Source, Dest
Instruction name
Instruction suffix
Destination of instruction results:
Registers/memory
Source of data for the instruction:
Registers/memory
Remember that we use AT&T assembly format

7. Data Representations: IA32 + x86-64
Sizes of C Objects (in Bytes)
C Data Type Generic 32-bit Intel IA32 x86-64
unsigned 4 4 4
int 4 4 4
long int 4 4 8
char 1 1 1
short 2 2 2
float 4 4 4
double 8 8 8
long double 8 10/12 16
char * 4 4 8
Or any other pointer

8. Instruction suffix
C declaration
Intel data type
GAS suffix
Size (bytes)
char
Byte b 1
short
Word w 2
int
Double word l 4
unsigned
long int
Quad word q 8
unsigned long
char *
float
Single precision s
double
Double precision d
long double
Extended precision t 16
Every operation in GAS has a single-character suffix
Denotes the size of the operand
Example: basic instruction is mov
Can move byte (movb), word (movw), double word (movl), and quad word (movq)
Note that floating point operations have entirely different instructions.

9. Registers 16 64-bit general purpose registers
Programmers/compilers can use these
All registers begin with %r
Rest of name is historical: from 8086
Registers originally had specific purposes
No restrictions on use of registers in commands
However, some instructions use fixed registers as source/destination
In procedures there are different conventions for saving/restoring the first 4 registers (%rax, %rbx, %rcx, %rdx) than the next 4 (%rsi, %rdi, %rsp, %rbp).
Final two registers have special purposes in procedures
%rbp (frame pointer)
%rsp (stack pointer)
Will discuss all these later

10. Registers 16 64-bit general purpose registers
The low-order 4 bytes can be independently read or written by operation instructions.
Done for backward compatibility with 8008 and 8080 (1970’s!)
When a byte of the register is changed, the rest of the register is unaffected.
The low-order 2 bytes (16 bits, i.e., a single word) can be independently read/wrote by word operation instructions
Comes from bit heritage
When a word of the register is changed, the rest of the register is unaffected.
See next slide!

11. x86-64 Integer Registers %rax %r8 %rbx %r9 %rcx %r10 %rdx %r11 %rsi
%eax
%r8
%r8d
%rbx
%ebx
%r9
%r9d
%rcx
%ecx
%r10
%r10d
%rdx
%edx
%r11
%r11d
%rsi
%esi
%r12
%r12d
%rdi
%edi
%r13
%r13d
%rsp
%esp
%r14
%r14d
%rbp
%ebp
%r15
%r15d
Can reference low-order 4 bytes (also low-order 1 & 2 bytes)

12. 16-bit virtual registers (backwards compatibility)
History: IA32 Registers
8-bit register (%ah, %al,ch, …)
Origin
(mostly obsolete)
%eax
%ecx
%edx
%ebx
%esi
%edi
%esp
%ebp
%ax
%ah
%al
accumulate
%cx
%ch
%cl
counter
%dx
%dh
%dl
data
general purpose
%bx
%bh
%bl
base
source
index
%si
destination
index
%di
stack
pointer
%sp
base
pointer
%bp
16-bit virtual registers
(%ax, %cx,dx, …)
(backwards compatibility)
32-bit register (%eax, %ecx, …)

13. Moving Data %rax %rcx %rdx %rbx %rsi %rdi %rsp %rbp %rN Moving Data
movq Source, Dest
Move 8-byte (“quad”) word
Lots of these in typical code
Operand Types
Immediate: Constant integer data
Example: $0x400, $-533
Like C constant, but prefixed with ‘$’
Encoded with 1, 2, or 4 bytes
Register: One of 16 integer registers
Example: %rax, %r13
But %rsp reserved for special use
Others have special uses for particular instructions
Memory: 8 consecutive bytes of memory at address given by register
Simplest example: (%rax)
Various other “address modes”

14. movl Operand Combinations
Source
Dest
Src,Dest
C Analog
Reg
movq $0x4,%rax
temp = 0x4;
Imm
Mem
movq $-147,(%rax)
*p = -147;
Reg
movq %rax,%rdx
temp2 = temp1;
movq
Reg
Mem
movq %rax,(%rdx)
*p = temp;
Mem
Reg
movq (%rax),%rdx
temp = *p;
Cannot do memory-memory transfer with a single instruction

15. Simple Memory Addressing Modes
Normal (R) Mem[Reg[R]]
Register R specifies memory address
Aha! Pointer dereferencing in C movq (%rcx),%rax
Displacement D(R) Mem[Reg[R]+D]
Register R specifies start of memory region
Constant displacement D specifies offset movq 8(%rbp),%rdx
Pretend that RAM is a big array named “Mem”

16. Simple Addressing Modes (cont)
Immediate $Imm Imm
The value Imm is the value that is used movq $4096,%rax
Absolute Imm Mem[Imm]
No dollar sign before the number
The number is the memory address to use movq 4096,%rdx
The book has more details on addressing modes!!

17. mov instructions Instruction Effect Description movq S,D D S
Move quad word
movl S,D
movw S,D
Move double word
Move word
movb S,D
Move byte
movsbl S,D
D SignExtend (S)
Move sign-extended byte
movzbl S,D
D ZeroExtend
Move zero-extended byte
Notes: 1. byte movements must use one of the 8 single-byte registers
2. word movements must use one of the 8 2-byte registers
3. movsbl takes single byte source, performs sign-extension on high-order 24 bits, copies the resulting double word to dest.
4. movzbl takes single byte source, performs adds 24 0’s to high-order bits, copies the resulting double word to dest

18. mov instruction example
Assume that %dh = 8D and %eax = at the beginning of each of these instructions
instruction result
movb %dh, %al %eax =
movsbl %dh, %eax %eax =
movzbl %dh, %eax %eax = D
FFFFFF8D D

19. mov instruction example
instruction addressing mode
movq $0x4050, %eax
movq %ebp, %esp
movq (%ecx), %eax
movq $-17, (%esp)
movq %eax, -12(%ebp)
ImmReg
Reg Reg
Mem  Reg
ImmMem
RegMem (Displacement)