1. - TFC status - Switch / RS
RO meeting 15/11/2000
Richard Jacobsson

2. RO meeting 15/11/2000
Richard Jacobsson

3. All switches TFC switch Design will change slightly:
- Sandwich idea dropped
--> no intermodule bus
- ECS interface on each switch
- Fitted on FB board instead of VME
--> More board space
--> More front panel space
- Everything 5V
- Verify skew and jitter
- Buy MUXes
TFC switch
RO meeting 15/11/2000
Richard Jacobsson

4. Throttle switches
RO meeting 15/11/2000
Richard Jacobsson

5. RS functions - Clock distribution(TTC) - L0 distribution
- Trigger controller
Trigger controller
Throttles
- ECS interface
ECS interface
ECS L0
- L0 distribution L1
- L1 distribution
- Clock distribution(TTC)
TTC encoder
Ch A/B
LHC clock
- Auto-trigger generator
Trigger generator
- Reset/cmd generator
Reset/command
generator
- “RS Front-End”
RS Front-End
L0/L1
DAQ
RO meeting 15/11/2000
Richard Jacobsson

6. - Open to new technology
- Aiming for flexibility in HW
--> change/add/remove
RO meeting 15/11/2000
Richard Jacobsson

7. Summary Switches settled on Readout Supervisor Review successful
Some layout changes to be made
Fit ECS interface
Making prototypes in January-February 2001
Readout Supervisor
Specifications sent to all detector people
Design in progress, very productive month with Zbig
Most of the important “blocks” designed (first version) and simulated.
Missing: Reset controller, counters, throttle history, Random generators, RS F-E, ECS interface
Looking for novelties on the FPGA side
Combined simulations of several blocks to be worked on
Staged review, first in March - April
RO meeting 15/11/2000
Richard Jacobsson