1. ECE 875: Electronic Devices
Prof. Virginia Ayres
Electrical & Computer Engineering
Michigan State University

2. Lecture 31, 28 Mar 14
Chp 04: metal-insulator-semiconductor junction: GATES
Capacitances: Low frequency voltage sweep: 1 Hz to 1KHz
High frequency voltage sweep: > 1Mz
- slow ramp: Pr. 4.06
- fast ramp
VM Ayres, ECE875, S14

3. C-V curves and Frequencies:
Use Gate voltage:
Sweeping Vgate for example ± 4 Volts over and over to turn the channel OFF and ON: binary logic
Low: 1- 1 kHz
Intermediate: 1 kHz - 1 MHz
High: > 1 MHz
Vgate: Slow ramp
Vgate: Fast ramp
ON/OFF cycles per sec
“counting” charge per sec applied to gate
VM Ayres, ECE875, S14

4. OFF ON C / Ci C-V curves for n-channel in p-substrate: Low
Intermediate
C / Ci
High + slow ramp
High + fast ramp
VM Ayres, ECE875, S14

5. OFF ON C / Ci C’min V’min = VT
What looks different in the readout: flat line in Vfor and Cmin shift
OFF ON
Low
C / Ci
Cmin
High + slow ramp
C’min
V’min = VT
Vmin
VM Ayres, ECE875, S14

6. Cmin = Ci CDmin CDmin = CminCi Ci + Cmin Ci + CDmin Low frequency C-V:
You know the experimental values in the circles.
Therefore it’s easy to get a number for Cdmin
Cmin = Ci CDmin
CDmin = CminCi
Ci + Cmin
Ci + CDmin
VM Ayres, ECE875, S14

7. Low frequency C-V:
Low: 1- 1 kHz: develop (ON) and later remove (=> OFF) a full inversion layer and a full depletion region
VM Ayres, ECE875, S14

8. High frequency + slow ramp:
> 1 MHz: develop and later remove a full depletion region charge qNAWD. But e-’s don’t have time to form a full inversion layer at the surface
Fig. 8, (b)
VM Ayres, ECE875, S14

9. High frequency + slow ramp: simpler:
C’Dmin = es /WDmax 
So total capacitance C’min is:
C’min = Ci C’Dmin
Ci + C’Dmin
VM Ayres, ECE875, S14

10. Low frequency High frequency, Slow ramp WDmax is bigger Qn smaller
VM Ayres, ECE875, S14

11. High frequency + slow ramp: WDmax
From strong inversion up to thermal energy
Have been finding WD = WDm at the start of inversion with ys = 2 kT/q ln (NA/ni).
But (Qs, ys) can be bigger
VM Ayres, ECE875, S14

12. High frequency + slow ramp: WDmax:
VM Ayres, ECE875, S14

13. Assume that Pr. 4.06  the high frequency- slow ramp condition
VM Ayres, ECE875, S14

14. Qn layer; no time to form at all
Low frequency
High frequency,
Slow ramp
High frequency,
Fast ramp
WDmax is bigger
WDmax is biggest
Qn layer; no time to form at all
Qn smaller
Qn biggest
VM Ayres, ECE875, S14

15. High frequency + fast ramp: during ON:
No Qn and big WDmax: “driven into deep depletion”
VM Ayres, ECE875, S14

16. across insulator region
CD  Qs region
ys = 0)
Ci 
across insulator region
VM Ayres, ECE875, S14

17. VM Ayres, ECE875, S14

18. ys
VGate

19. Iterate Pr. 3. 9 until donor concentration ND-nth – ND-(nth+1) = 0
Iterate Pr. 3.9 until donor concentration ND-nth – ND-(nth+1) = 0.01 x 1016 cm-3