1. A hierarchy independent approach (ongoing work) Michael Monerau Chris Hankin Courant Institute, NYU Ecole Normale Supérieure de Paris, France Imperial College London

2. Problem description Abstract Interpretation Cache prediction Related & Future work Conclusion 2

3. Quick introduction: How do cache work? 3

4. CPUs Cache hierarchy Read / Write L1 L2 L3 Virtual Memory Off-chipOn-chip 4

5. CPUs Cache hierarchy Read / Write L1 L2 L3 Ask for data Sends data Off-chipOn-chip 5

6. Cache Level Cache line...................... An example: 4-Way Associative Cache 0. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. A cache line contains a copy of a Virtual Memory Block VM Address % 3 == 0 VM Address % 3 == 1 VM Address % 3 == 2 6

7. Cache hierarchies may vary a lot Number of levels Internals of each level Replacement strategies (each level) Write strategies Inter-level strategies Several CPUs, shared/unshared level Combinatorial explosion ! 7

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9. A quick overview of Abstract Interpretation 9

10. CONCRETE WORLDABSTRACT WORLD 10

11. CONCRETE WORLDABSTRACT WORLD T T T T 11

12. Soundness is optimal 12

13. x = Rand(1, 10) y = 1 y = 0 Print y x > 5 x <= 5 1. 2.3. 4. 13

14. e.g. with intervals: x = Rand(1, 10) y = 1 y = 0 Print y x > 5 x <= 5 1. 2.3. 4. 14

15. Description of the abstract domain for cache prediction 15

16. Cache Level Relation Strategy Stock Strategy Stock Management (low-level data organization) Stock Management (low-level data organization) Other level Receive / Forward Requests Report updates Make Address Available Candidate locations 16 L3 L1 L2

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19. ABSTRACTION FOR A LINES CACHE Galois Connection 19

20. a4 ChangePriority # (Ad, pr) 20.. a1 a2 a3 a5 a6.... Priority pr.. a1 a2 a3 a5 a6.... Priority pr Ad a4 Ad a7 Ad a4 Moved 0 or 1 down Moved 1 down Soundness Soundness :

21. CONCRETE WORLD Miss p(Address) Hit p(Address) ABSTRACT WORLD Let Miss Hit/Miss? Hit 21

22. Virtual Memory CPU Cache hierarchy L1 L2 L3 Scratchpad Hardware managed Analysis gives information: Possible contents of the cache Simulate Scratchpad as a « L0 » cache Heuristic Software managed Scratchpad allocation strategy 22 If (unlikely) y=0 dont put y on the scratchpad If (unlikely) y=0 dont put y on the scratchpad

23. Related Work [Wilhelm et al. VMCAI10] and [Reineke et al. SAS09]: clever abstract domains, no generic proof, no hierarchy [Marvadel et al.]: profiling (for scratchpad allocation) Future work Safe initial states for some replacement strategies (domino effect, … cf. [SAS09], [Berg 06]) Improvements proposed in [SAS09] Implementation & benchmarks Clever strategies for scratchpads 23

24. Modular analysis: Hierarchy-independent Replacement strategy-independent Easy-to-build transfer functions Formal and modular proofs of soundness 24