Presentation is loading. Please wait.

Presentation is loading. Please wait.

Zhongguo Liu Biomedical Engineering

Similar presentations


Presentation on theme: "Zhongguo Liu Biomedical Engineering"— Presentation transcript:

1 Biomedical Signal processing Chapter 6 structures for discrete-time system
Zhongguo Liu Biomedical Engineering School of Control Science and Engineering, Shandong University 山东省精品课程《生物医学信号处理(双语)》 2019/5/3 1 Zhongguo Liu_Biomedical Engineering_Shandong Univ.

2 §6 structures for discrete-time system
6.0 Introduction 6.1 Block Diagram Representation of Linear Constant-Coefficient Difference Equations 6.2 Signal Flow Graph Representation of Linear Constant-Coefficient Difference Equations 6.3 Basic Structures for IIR Systems 6.4 Transposed Forms 6.5 Basic Network Structures for FIR Systems

3 Structures for Discrete-Time Systems
6.0 Introduction

4 Characterization of an LTI System:
6.0 Introduction Characterization of an LTI System: Impulse Response z-Transform: system function Difference Equation →Frequency response converted to a algorithm or structure that can be realized in the desired technology, when implemented with hardware. Structure consists of an interconnection of basic operations of addition, multiplication by a constant and delay

5 Example: find the output of the system
with input x[n]. Solution1: IIR Impulse Response even if we only wanted to compute the output over a finite interval, it would not be efficient to do so by discrete convolution since the amount of computation required to compute y[n] would grow with n . Illustration for the IIR case by convolution

6 Example: find the output of the system
with input x[n]. Solution2: computable recursively The algorithm suggested by the equation is not the only computational algorithm, there are unlimited variety of computational structures (shown later).

7 Why Implement system Using Different Structures?
Equivalent structures with regard to their input-output characteristics for infinite-precision representation, may have vastly different behavior when numerical precision is limited. Effects of finite-precision of coefficients and truncation or rounding of intermediate computations are considered in latter sections. Computational structures(Modeling methods): Block Diagram Signal Flow Graph

8 Structures for Discrete-Time Systems
6.1 Block Diagram Representation of Linear Constant-Coefficient Difference Equations

9 6.1 Block Diagram Representation of Linear Constant-Coefficient Difference Equations
Three basic elements: Unit Delay (Memory, storage) x[n] x[n-1] z1 M sample Delay z-M x[n-M] x[n] a ax[n] Multiplier + x1[n] x2[n] x1[n] + x2[n] Adder

10 Ex. 6.1 draw Block Diagram Representation of a Second-order Difference Equation
Solution: x[n] + b0 a1 z1 a2 y[n] y[n-1] y[n-2]

11 Nth-Order Difference Equations
Form changed to a[0] normalized to unity

12 Block Diagram Representation (Direct Form I)
+ z1 b0 b1 bM1 bM x[n] x[n-1] x[n-2] x[n-M] a1 aN1 aN y[n] y[n-1] y[n-2] y[n-N] v[n]

13 Block Diagram Representation (Direct Form I)
v[n] + z1 b0 b1 bM1 bM x[n] x[n-1] x[n-2] x[n-M] a1 aN1 aN y[n] y[n-1] y[n-2] y[n-N]

14 Block Diagram Representation (Direct Form I)
Implementing zeros Implementing poles v[n] + z1 b0 b1 bM1 bM x[n] x[n-1] x[n-2] x[n-M] a1 aN1 aN y[n] y[n-1] y[n-2] y[n-N]

15 Block Diagram Representation (Direct Form I)
How many Adders? How many multipliers? How many delays? N +M N +M+1 N+M + z1 b0 b1 bM1 bM x[n] x[n-1] x[n-2] x[n-M] a1 aN1 aN y[n] y[n-1] y[n-2] y[n-N] v[n]

16 Block Diagram Representation (Direct Form I)
v[n] + z1 b0 b1 bM1 bM x[n] x[n-1] x[n-2] x[n-M] a1 aN1 aN y[n] y[n-1] y[n-2] y[n-N]

17 Block Diagram Representation (Direct Form II)
(or called Canonic direct Form) + z1 b0 b1 bN1 bN x[n] a1 aN1 aN y[n] w[n-1] w[n-2] w[n-N] w[n] Assume M = N

18 Block Diagram Representation (Direct Form II)
+ z1 b0 b1 bN1 bN x[n] a1 aN1 aN y[n] w[n-1] w[n-2] w[n-N] w[n] Assume M = N

19 Block Diagram Representation (Direct Form II)
Implementing poles Implementing zeros + z1 b0 b1 bN1 bN x[n] a1 aN1 aN y[n] w[n-1] w[n-2] w[n-N] w[n] Assume M = N

20 Block Diagram Representation (Direct Form II)
How many Adders? How many multipliers? How many delays? N +M+1 N+M + z1 b0 b1 bN1 bN x[n] a1 aN1 aN y[n] w[n-1] w[n-2] w[n-N] w[n] Assume M = N

21 Block Diagram Representation (Canonic Direct Form or direct Form II)
How many Adders? How many multipliers? How many delays? max(M, N) N +M N +M+1 N + b0 b1 bN1 bN x[n] z1 a1 aN1 aN y[n] Assume M = N

22 Ex. 6.2 draw Direct Form I and Direct Form II implementation of an LTI system
Solution: + z1 1 2 x[n] x[n-1] 1.5  0.9 y[n] y[n-1] y[n-2] v[n] x[n] + z1 1.5  0.9 y[n] w[n-1] w[n-2] 1 2 w[n]

23 Structures for Discrete-Time Systems
6.2 Signal Flow Graph(信号流图) Representation of Linear Constant-Coefficient Difference Equations

24 6.2 Signal Flow Graph Representation of Linear Constant-Coefficient Difference Equations
A Signal Flow Graph is a network of directed branches (有向支路)that connect at nodes(节点). Associated with each node is a variable or node value, being denoted wj[n]. wj[n] wk[n] Node j Node k 梅森(Mason)信号流图

25 Nodes And Branches Input wj[n] wj[n] a or z-1 wk[n] Node j
We will only consider linear Signal Flow Graph Output: A linear transformation of input, such as constant gain and unit delay. Input wj[n] if omitted, it indicates unity a or z-1 Brach (j, k) wj[n] wk[n] Node j Node k Each branch has an input signal and an output signal. An internal node serves as a summer, i.e., its value is the sum of outputs of all branches entering the node.

26 Source Nodes (源点 ) Sink Nodes (汇点 ) xj[n] wk[n]
Source node j Nodes that have no entering branches yk[n] wj[n] Sink node k Sink Nodes (汇点 ) Nodes that have only entering branches

27 Example : determine Linear Constant-Coefficient Difference Equations of SFG
x[n] y[n] w1[n] w2[n] a b c d e Source Node Sink Node Solution:

28 Block Diagram vs. Signal Flow Graph
x[n] w[n] y[n] + a z1 b1 b0 branching point Canonic direct Form Source Node w1[n] Sink Node a b1 b0 1 2 3 4 x[n] w2[n] y[n] w3[n] Delay branch By convention, variables is represented as sequences rather than as z-transforms z1 w4[n] =w2[n-1] Delay branch cannot be represented in time domain by a branch gain by z-transform, a unit delay branch has a gain of z-l.

29 Block Diagram vs. Signal Flow Graph
Determine the difference equation (System Function) from the Flow Graph. Solution: x[n] + a z1 b1 b0 w[n] y[n] a b1 b0 z1 1 2 3 4 w1[n] x[n] y[n] w2[n] w3[n] w4[n]

30 Block Diagram vs. Signal Flow Graph
Determine difference equation difficult in time-domain

31 Ex. 6.3 Determine the System Function from Flow Graph
Solution:

32 Ex. 6.3 Determine the System Function from Flow Graph
for causal system :

33 Ex. 6.3 compare two implementation
requires only one multiplication and one delay (memory) element direct form I implementation -a a x[n] z-1 y[n] two multiplication and two delay

34 Structures for Discrete-Time Systems
6.3 Basic Structure for IIR Systems

35 6.3 Basic Structure for IIR Systems
for a rational system function, many equivalent difference equations or network structures exists. one criteria in the choice among these different structures is computational complexity: Reduce the number of constant multipliers Increase speed Reduce the number of delays Reduce the memory requirement others: VLSI design;Modularity; multiprocessor implementations; effects of a finite register length and finite-precision arithmetic

36 Basic Structures for IIR Systems
Direct Forms Cascade Form Parallel Form

37 6.3.1 Direct Forms v[n] x[n] y[n] z1 b0 b1 bM1 bM x[n-1] x[n-2]
+ z1 b0 b1 bM1 bM x[n] x[n-1] x[n-2] x[n-M] a1 aN1 aN y[n] y[n-1] y[n-2] y[n-N]

38 v[n] x[n] y[n] Direct Form I x[n] y[n] v[n] Block Diagram
+ z1 b0 b1 bM1 bM x[n] x[n-1] x[n-2] x[n-M] a1 aN1 aN y[n] y[n-1] y[n-2] y[n-N] Direct Form I Block Diagram b0 b1 x[n] x[n-1] x[n-2] x[n-M] y[n] b2 bN-1 bN x[nM+1] a1 a2 aN-1 aN y[n-1] y[n-2] y[n-N] y[nN+1] z1 v[n] Signal Flow Graph

39 Direct Form I Signal Flow Graph
b0 b1 x[n] x[n-1] x[n-2] x[n-M] y[n] b2 bN-1 bN x[nM+1] a1 a2 aN-1 aN y[n-1] y[n-2] y[n-N] y[nN+1] z1 v[n]

40 Direct Form II x[n] y[n] w[n] b0 b1 b2 bN-1 bN a1 a2 aN-1 aN z1

41 Direct Form II x[n] y[n] w[n] b0 b1 b2 bN-1 bN a1 a2 aN-1 aN z1

42 Ex. 6.4 draw Direct Form I and Direct Form II structures of system
Solution: x[n] y[n] z1 2 0.75 Direct Form I 0.125 x[n] y[n] z1 2 Direct Form II 0.75 0.125

43 6.3.2 Cascade Form(串联形式) when all the coefficients are real
1st-order factors represent real zeros at gk and real poles at ck , and the 2nd-order factors represent complex conjugate pairs of zeros at hk and h*k and poles at dk ,d*k

44 Cascade Form A modular structure 2nd Order System

45 Cascade Form For example, assume Ns=3 x[n] 1 2 3 y[n]
z1 a11 a21 b11 b21 b01 z1 a12 a22 b12 b22 b02 z1 a13 a23 b13 b23 b03 It is used when implemented with fixed-point arithmetic, the structure can control the size of signals at various critical points because they make it possible to distribute the overall gain of the system.

46 Ex. 6.5 draw the Cascade structures
Solution: x[n] y[n] z1 0.75 0.125 2 Direct Form II 1st-order Direct Form I 1st-order Direct Form II

47 Another Cascade Form x[n] y[n] implemented with fixed-point arithmetic
used to decrease the amount of computation, when floating-point arithmetic is used and dynamic range is not a problem. b0 z1 a11 a21 b11 b21 z1 a12 a22 b12 b22 z1 a13 a23 b13 b23 x[n] y[n] ~ ~ ~

48 6.3.3 Parallel Form

49 Parallel Form Group Real Poles in pairs Complex Poles Poles at zero

50 Parallel Form z1 a1k a2k e0k e1k x[n] y[n] Ckz-k C0

51 Ex. 6.6 draw parallel-form structures of system
Solution 1: If we use 2nd –order sections, 8 x[n] y[n] z1 0.75 0.125 7

52 Ex. 6.6 draw parallel-form structures of system
Solution 2: If we use 1st –order sections, z1 0.5 18 8 x[n] y[n] 0.25 25

53 6.3.4 feedback in the IIR systems
z1 a x[n] y[n] systems with feedback may be FIR z1 a x[n] y[n] -a2 z1 a x[n] y[n] Noncomputable network a x[n] y[n]

54 Structures for Discrete-Time Systems
6.4 Transposed Forms

55 Flow Graph Reversal or Transposition
6.4 Transposed Forms There are many procedures for transforming signal flow graphs into different forms while leaving the overall system function between input and output unchanged. Flow Graph Reversal or Transposition Changes the roles of input and output. Reverse the directions of all arrows. Transposing doesn’t change the input-output relation z1 a z1 a x[n] y[n] y[n] x[n]

56 Ex. 6.7 determine Transposed Forms for a first-order system
x[n] y[n] z1 a Solution: y[n] x[n] x[n] y[n] z1 a z1 a

57 Ex. 6.8 draw Transposed Forms for a basic second-order section
Solution: Both have the same system function or difference equation

58 Ex. 6.8 Transposed Forms for a basic second-order section
x[n] y[n] b2 a1 a2 z1 v1[n] x[n] y[n] b0 b1 b2 z1 v2[n] a1 a2 b0 b1 x[n] y[n] b2 a1 a2 z1 v1[n]

59 Transposed Direct Form I
b0 b1 x[n] x[n-1] x[n-2] x[n-M] y[n] b2 bN-1 bN x[nM+1] a1 a2 aN-1 aN y[n-1] y[n-2] y[n-N] y[nN+1] z1 v[n] b0 b1 x[n] y[n] b2 bN-1 bN a1 a2 aN-1 aN z1 v'[n]

60 Transposed Direct Form II
x[n] y[n] w[n] b0 b1 b2 bN-1 bN a1 a2 aN-1 aN z1 y[n] w' [n] x[n] b0 z1 a1 b1 z1 a2 b2 aN-1 bN-1 z1 aN bN

61 Structures for Discrete-Time Systems
6.5 Basic Structure for FIR Systems

62 6.5 Basic Structure for FIR Systems
Direct Form For causal FIR systems, the system function has only zeros(except for poles at z = 0).

63 Direct Form I v[n] x[n] y[n] x[n] y[n] z1 z1 y[n] x[n-1] x[n-2]
b0 b1 x[n] x[n-1] x[n-2] x[n-M] y[n] b2 bM-1 bM x[nM+1] a1 a2 aN-1 aN y[n-1] y[n-2] y[n-N] y[nN+1] z1 v[n] y[n] x[n-1] x[n-2] x[nM+1] x[n-M] x[n] y[n] z1 h[0] h[1] h[2] h[M1] h[M]

64 Direct Form II w[n] x[n] y[n] x[n] y[n] b0 b1 b2 bM-1 bM a1 a2 aN-1 aN
z1 y[n] x[n] y[n] z1 h[0] h[1] h[2] h[M1] h[M]

65 Traspostion of Direct Form
x[n] y[n] z1 h[0] h[1] h[2] h[M1] h[M] tapped delay line structure or transversal filter structure. 抽头延迟线结构 or 横向滤波器结构. x[n] y[n] z1 h[0] h[1] h[2] h[M1] h[M] x[n] y[n] z1 h[0] h[1] h[2] h[M1] h[M]

66 6.5.2 Cascade Form y[n] x[n] z1 b01 b11 b21 b02 b12 b22 b1Ms b2Ms

67 Cascade Form x[n] y[n] x[n] y[n] z1 a11 a21 b11 b21 b01 z1 a12 a22
b1Ms b2Ms b0Ms

68 6.5.3 Structures for Linear Phase Systems
A causal FIR system has generalized linear phase if h[n] satisfies: h[M-n]= h[n] for n = 0,1,…,M or h[M-n]= h[n] for n = 0,1,…,M M is even M is odd h[M-n]= h[n] h[M-n]= h[n] Type I Type II Type III Type VI x[n] y[n] z1 h[0] h[1] h[2] h[M1] h[M] M+1 multiplications

69 Symmetry means we can half the number of multiplications
For even M and type I or type III systems: M/2 M M/2 M

70 Type I and III x[n] y[n] x[n] y[n] x[n-1] x[n-2] x[n-M] x[n] x[n-M+1]
z1 h[0] h[1] h[2] h[M1] h[M] x[n-1] x[n-2] x[n-M] x[n] x[n-M+1] Type I and III M/2 M M/2 M x[n-1] x[n-2] x[n-M/2+1] x[n-M/2] x[n-M] x[n] x[n-M+1] x[n-M+2] x[n-M/2-1] x[n] y[n] z1 h[M/2] h[M/21] h[0] h[1] h[2] - Type III =0 Type I

71 Type II or Type IV FIR Systems
For odd M and type II or type IV systems: M/2 M M/2 M

72 Type II and IV x[n] Structure for odd M y[n] x[n-1] x[n-2] x[n-M]
z1 h[0] h[1] h[2] h[M1] h[M] Type II and IV Structure for odd M M/2 M M/2 M x[n-(M-1)/2] x[n-(M+1)/2] x[n-1] x[n-2] x[n-M] x[n-M+1] x[n-M+2] x[n] - Type II Type IV

73 Type I, and II x[n] y[n] x[n-(M-1)/2] x[n-(M+1)/2] x[n-1] x[n-2]
Type II x[n-1] x[n-2] x[n-M/2+1] x[n-M/2] x[n-M] x[n] x[n-M+1] x[n-M+2] x[n-M/2-1] x[n] y[n] z1 h[M/2] h[M/21] h[0] h[1] h[2] Type I

74 6.6 OVERVIEW OF FINITE-PRECISION NUMERICAL EFFECTS
6.6.1 Number Representations A real number can be represented with infinite precision in two's-complement form as where Xm is an arbitrary scale factor and the bis are either 0 or 1. The quantity b0 is referred to as the sign bit. If b0= 0, then 0≤ x <Xm , and if b0= 1, then -Xm≤ x <0.

75 6.6.1 Number Representations
For a finite number of bits (B +1), the equation above must be modified to so the smallest difference between numbers is the quantized numbers are in the range : -Xm≤ <Xm.

76 6.6.1 Number Representations
The fractional part of can be represented with the positional notation quantizing a number to (B +1) bits can be implemented by rounding or by truncation, which is a nonlinear memoryless operation. define the quantization error as

77 6.6.1 Number Representations
For the case of two's-complement rounding, - Δ/2 < e <Δ/2, and for two's-complement truncation, - Δ< e <0 For B =2 rounding truncation

78 6.6.2Quantization in Implementing Systems
Consider the following system A more realistic model would be

79 6.6.2 Quantization in Implementing Systems
In order to analyze it we would prefer

80 6.7.1 Effects of Coefficient Quantization in IIR Systems
When the parameters of a rational system are quantized, The poles and zeros of the system function move. If the system structure of the system is sensitive to perturbation of coefficients, The resulting system may no longer meet the original specifications, and may no longer be stable.

81 6.7 Effects of Coefficient Quantization in IIR Systems
Detailed sensitivity analysis for general case is complicated. Using simulation tools, in specific cases, Quantize the coefficients and analyze frequency response Compare frequency response to original response We would like to have a general sense of the effect of quantization

82 6.7.1 Effects of Coefficient Quantization in IIR Systems
Each root is affected by quantization errors in ALL coefficient Tightly clustered roots are significantly effected Narrow-bandwidth lowpass or bandpass filters can be very sensitive to quantization noise

83 Effects on Roots(poles and zeros)
Quantization The larger the number of roots in a cluster the more sensitive it becomes So second order cascade structures are less sensitive to quantization error than higher order system Each second order system is independent from each other

84 6.7.2 Example of Coefficient Quantization in an Elliptic Filter
An IIR bandpass elliptic filter was designed to meet the following specifications:

85 6.7.2 Example of Coefficient Quantization in an bandpass Elliptic Filter
Poles and zeros of H(z) for unquantized Coefficients and 16-bit quantization of the direct form 16-bit quantization unquantized the direct form system cannot be implemented with 16-bit coefficients because it would be unstable

86 the cascade form is much less sensitive to coefficient quantization
Example of Coefficient Quantization in an bandpass Elliptic Filter the cascade form is much less sensitive to coefficient quantization 16-bit quantization Magnitude in passband for 16-bit quantization of the cascade form

87 6.7.2 Example of Coefficient Quantization in an Elliptic Filter

88 6.7.3 Poles of Quantized 2nd-Order Sections
Consider a 2nd order system with complex-conjugate pole pair

89 6.7.3 Poles of Quantized 2nd-Order Sections
The pole locations after quantization will be on the grid point  3-bits

90 6.7.3 Poles of Quantized 2nd-Order Sections
The pole locations after quantization will be on the grid point  7-bits

91 Coupled-Form Implementation of Complex-Conjugate Pair
Equivalent implementation of the 2nd order system Twice as many constant multipliers are required to achieve more uniform density.

92 Coupled-Form Implementation of Complex-Conjugate Pair
Twice as many constant multipliers are required to achieve this more uniform density of quantization grid  3-bits  7-bits

93 6.7.4 Effects of Coefficient Quantization in FIR Systems
No poles to worry about only zeros Direct form is commonly used for FIR systems Suppose the coefficients are quantized

94 6.7.4 Effects of Coefficient Quantization in FIR Systems
No poles to worry about only zeros Direct form is commonly used for FIR systems

95 6.7.4 Effects of Coefficient Quantization in FIR Systems
Quantized system is linearly related to the quantization error Again quantization noise is higher for clustered zeros However, most FIR filters have spread zeros

96 6.8 EFFECTS OF ROUND-OFF NOISE IN DIGITAL FILTERS
Difference equations implemented with finite-precision arithmetic are non-linear systems. Second order direct form I system

97 6.8 EFFECTS OF ROUND-OFF NOISE IN DIGITAL FILTERS
Density function error terms for rounding Model with quantization effect

98 6.8.1 Analysis of the Direct Form IIR Structures
Combine all error terms to single location to get

99 6.8.1 Analysis of the Direct Form IIR Structures
The variance of e[n] in the general case is The contribution of e[n] to the output is

100 6.8.1 Analysis of the Direct Form IIR Structures
The variance of the output error term f[n] is

101 Example 6.9 Round-Off Noise in a First-Order System
Suppose we want to implement the following stable system The quantization error noise variance is

102 Example 6.9 Round-Off Noise in a First-Order System
Noise variance increases as |a| gets closer to the unit circle As |a| gets closer to 1 we have to use more bits to compensate for the increasing error

103 6.9 Zero-Input Limit Cycles in Fixed-Point Realization of IIR Filters
For stable IIR systems the output will decay to zero when the input becomes zero A finite-precision implementation, however, may continue to oscillate indefinitely Nonlinear behaviour is very difficult to analyze, so we will study by example

104 6.9 Zero-Input Limit Cycles in Fixed-Point Realization of IIR Filters
Example: Limite Cycle Behavior in First-Order Systems Assume x[n] and y[n-1] are implemented by 4 bit registers

105 Assume that a=1/2=0.100b and the input is
Example Cont’d Assume that a=1/2=0.100b and the input is If we calculate the output for values of n n y[n] Q(y[n]) 7/8=0.111b 1 7/16= b 1/2=0.100b 2 1/4= b 1/4=0.010b 3 1/8= b 1/8=0.001b 4 1/16= b A finite input caused an oscillation with period 1

106 Example: Limite Cycles due to Overflow
Consider a second-order system realized by Where Q() represents two’s complement rounding Word length is chosen to be 4 bits Assume a1=3/4=0.110b and a2=-3/4=1.010b Also assume The output at sample n=0 is

107 Example: Limite Cycles due to Overflow
2019年5月3日5时36分 Example: Limite Cycles due to Overflow The output at sample n=0 is After rounding up we get Binary carry overflows into the sign bit changing the sign When repeated for n=1

108 Avoiding Limit-Cycles
Desirable to get zero output for zero input: Avoid limit-cycles Generally adding more bits would avoid overflow Using double-length accumulators at addition points would decrease likelihood of limit cycles

109 Avoiding Limit-Cycles
Trade-off between limit-cycle avoidance and complexity FIR systems cannot support zero-input limit cycles

110 Zhongguo Liu_Biomedical Engineering_Shandong Univ.
2019年5月3日5时36分 Chapter 6 HW 6.5, 6.6, 6.19, 6.20 6.1, 6.3 Zhongguo Liu_Biomedical Engineering_Shandong Univ. 111 2019/5/3 返 回 上一页 下一页


Download ppt "Zhongguo Liu Biomedical Engineering"

Similar presentations


Ads by Google