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Digital Modeling/Implementation of Valve Amplifiers
Cody Frye & Mitchell Gould
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Agenda Introduction Motivation System Description Methods
Preliminary Results Hardware Implementation Consideration Bill of Materials Schedule of Work
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Introduction
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Introduction Significance of valve amplifiers Pros of valve amplifiers
Smooth clipping Warm tone characteristics Cons of valve amplifiers Weight Heat Cost
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Motivation Affordable, Cheap, and Convenient
Multiple Amplifiers to choose from No Analog Components for reduced Component Size
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System Description
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System Description The Preamp, Gain, Tone and Output blocks will be modeled according the schematic found online Each block will be the WDF equivalent of the analog components making up the circuitry
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Pre-Amplification Stage
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Gain Stages
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Tone Stack
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Output Driver
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Methods Frequency Bin / Lookup Table Method
Model Individual Blocks of System Wave Digital Filtering
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Method 1 (Frequency Bin Method)
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Method 1 (Frequency Bin Method)
Separate input signal into Multiple frequency bins bandPass Filters NonLinear transfer function represented by L.U.T.s Sum all the bins together
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Method 2 (Wave Digital Filters)
WDF Binary Tree for Triode Amplifier WDF triode Stage (example) Binary Tree by Matti Karjalainen and Jyri Pakarinen
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WDF Method Continued Wave quantities A = incident wave
B = reflected wave
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WDF Method Continued WDF 3 port adapters WDF components
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Preliminary Results Filter banks design High order bandpass filters
Difficult to implement in real-time Not a sufficient method
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Preliminary Results Simulated a RC High Pass Filter
Time Domain results using chirp signal (left) Frequency Domain results (right)
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High Pass Filter WDF Equivalent
Two Port Parallel Adapter Analog RC High Pass Filter Three Port Series Adapter
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High Pass Filter (WDF)
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Preliminary Results (Triode Valve)
Nonlinear Triode Currents as a Function of Vgk and Vpk Triode Amplifier Model of Triode
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Preliminary Results (Triode Valve)
Leach’s Model Equations Norman Koren’s Model Equations
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Preliminary Results (Leach’s model)
Vpk = 350 Vgk = 2 Vpk = 300 Vpk = 250 Vgk = 1 Vpk = 200 Vpk = 150 Vgk = 0 Vgk = -1 Vpk = 100 Vpk = 50 Vpk = 0 Vgk = -2 Vgk = -3
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Preliminary Results (Koren’s model)
Vgk = 1 Vpk = 300 Vpk = 250 Vpk = 200 Vpk = 150 Vgk = 0 Vpk = 100 Vpk = 50 Vpk = 0 Vgk = -1 Vgk = -2 Vgk = -3
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Hardware Implementation Consideration
Zynq 7000 FPGA/ARM Processor System on Chip (SoC) Audio codec Mikroe-506 Audio Codec Board WM8731 IC 44.1kHz Sample Rate Stereo inter -IC sound (i2s) protocol
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Bill of Materials Mikroe-506 Audio Codec Board - $19.38
Digilent PYNQ Board - $229.00 ¼” female adaptors - (2) $0.86 per piece Crate Blue Voodoo 120 Valve Amplifier - $ used
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Schedule Dates Task Assigned Too 1/19 - 2/2 Tone-stack WDF design/simulation Cody 2/3 - 2/16 Triode valve WDF design/simulation Mitchell 2/17 - 3/2 Pentode valve WDF design/simulation 3/3 - 3/16 Gain Stage WDF design 3/17 - 3/30 Overall Simulation 4/6 - 4/20 FPGA Hardware Configuration/Implementation 4/21 - 5/4 Student Expo and Final Presentation
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Conclusion Aims to digitally emulate Analog Circuitry of a valve amplifier using WDF Implement on an zynq SOC device Utilize i2s protocol
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