1. Project Meadowlark CMOS Programmable Digital Low-Pass Filter
Jennifer Galaway
Jennifer Williams
University of Portland School of Engineering

2. Overview Pictures of Chip Block Diagram and L-EDIT Layout
Accomplishments
Plans
Issues/Alternatives
University of Portland School of Engineering

3. System Block Diagram
University of Portland School of Engineering

4. L-EDIT Layout
University of Portland School of Engineering

5. Milestones Number Description Original Date Previous Present 1
Product Approval
10/04/02 2
Plan Approval
10/25/02 3
TPR File Completed
11/27/02 4
Design Release
12/06/02 5
TOP’s Approval
02/14/03 6
Receive MOSIS Chip
03/17/03 7
Prototype Release
04/04/03 8
Founder’s Day
04/07/03 9
Post Mortem
04/22/03 10
Final Report
04/25/03
University of Portland School of Engineering

6. Accomplishments Design Review Complete TPR file Complete
Began Ordering Parts
Chip is in Fabrication
Started working on Macro Model
University of Portland School of Engineering

7. Plans MACRO MODEL Theory of Operations
Theory of Operations Approval Meetings
More ordering of parts
University of Portland School of Engineering

8. Issues/Alternatives Programming the GAL’s Learning how to wire wrap
TIME
University of Portland School of Engineering

9. Questions?
University of Portland School of Engineering