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Sources of Constraints in Computations
Data dependencies in the computation Timing properties of the individual computations Number and kind of components are connected Constraints on the control structure Suppose we want to compute r(x) = p(g(f(x)), p(f(x), h(x))) p, g, f, and h are separate combinational functions p requires two inputs, g, f, and h require only one If we are free to connect things, we can compute the function as a combinational function as shown below h f g p1 p2 x r(x)
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Computing using Constrained Resources
In the previous implementation, we are using multiple resources of the same kind (like p) That is expensive Moreover, many resources are not computing at most of the time even if we had requirement to compute Datapaths are designed to sequentialize computation and minimize the requirement of resources An example of multiple functional unit data path is shown in the next slide
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Multiple Functional Units and Computation
A Data path may have multiple functional units It may also have some restriction on how to move data around For example consider the following data path All lines in this data path are n-bit wide A and B are registers f, g, h, and p are functional units Any output can be enabled A and B reg can be loaded X is input Output is from B fd f gd g hd h pd p xd x B BLE A ALE
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Computation Organization
To perform the given computation, we do the following steps load x into reg A Begin operation of module f and wait for it to complete Completion depends on the propagation delay of module f Load the output of f into reg B, enable fd and BLE signals What next…. is dictated by the structure of data path and required computation f fd xd x B BLE A ALE h hd g gd p pd h f g p1 p2 x r(x)
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Precedence Constraints (Relations)
Precedence constraint dictates a certain ordering Function g cannot starts until f is completed p1 cannot start until both f and h are computed p2 cannot starts until g and p1 are completed Let us denote fs and ff as start and finish of function f Then ff < gs or ff precedes gs and the corresponding events must occur in that order Two events can be simultaneous as is the case for f and h When there is no confusion, we will drop superscript f < g means f must occur before g f <= g and g <= f implies that the two can be simultaneous For the example, f < g, f < p1, h < p1, g < p2, and p1 < p2
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Other Dependencies and Precedence Graph
Data dependencies reflect structure of computation and the flow of information among its operations These are inherent in the algorithms There is a data dependency from r to s (r < s) if some value produced by r is used or required as an input to s Device specification reflect physical constraints imposed by the component timing constraints A precedence graph is a graph showing order of computation and data dependencies It specifies a partial ordering on the set of operations Neither h < g or g < h applies for our example This represents a degree of freedom However, note that f < p2 apples but is not included as it is captured in some other dependency
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Some Properties of Precedence Graph
A precedence graph provides a useful means for visualizing the potential concurrency allowed by a set of precedence constraints For example g and P1 may take place simultaneously (provided f and h has been computed) f and h can take place simultaneously (but cannot be written back simultaneously due to resource constraint) A data dependence graph is a precedence graph depicting only the constraints due to data dependencies Device specification: Timing constraints fs <= ff indicate another f cannot start until the first one finishes Data dependencies and device specifications represent essential precedence constraints, we cannot avoid them
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Data Path Topology A third source of constraint is number and kind of components and the way they are connected Precedence relations may not be adequate to express topological constraints For example, in our data path, we have only one p module Therefore p1 and p2 may not proceed simultaneously It is on in this case as we cannot even start them together Use of a shared bus dictates that at most one value can be written back at one time f and h results with input x must be written at different times This may not be a problem if transfer time is short However, watch out for contamination due to input change Functional units, registers, and buses are common conflicts
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Data Path Topology (Contd.) and Serialization
Mutual exclusion constraint typically arise from conflict over resources, e.g., p3 ( p1(x), p2(x) ) would allow p1 an dp2 to go simultaneously but will be prohibited due to single p Precedence graph has no mechanism to express mutual exclusion like p1 and p2 need to be mutually exclusive above We can reduce resource conflicts by replicating resources Else, serialization of a computation can be used to impose additional precedence constraints Serialization provides a total order over computation For example for the given computation, we can serialize it as x < f < g < h < p1 < p2 < r(x) or x < f < h < g < p1 < p2 < r(x) or x < f < h < p1 < g < p2 < r(x) or x < h < f < g < p1 < p2 < r(x) or x < h < f < p1 < g < p2 < r(x) Serialization, once done, severely restrict our choice
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