1. General Purpose Processor : Software
Embedded Systems
Prof. Ramesh

2. General Purpose Processors
Basic architecture – operation - pipelining
Programmers view
Development environment
Application specific instruction set processors (ASIP)
Micro controllers and digital signal processors
Embedded Systems
Prof. Ramesh

3. General purpose processor :
It is a programmable digital system intended to solve computational problems in large variety of applications.
An embedded system designer must look into the following factors
Unit cost of the processor.
NRE cost
Embedded system design
Embedded Systems
Prof. Ramesh

4. Basic Architecture:
The general purpose processor consists of data path and control unit tightly linked with memory.
Data path:
The data path consists of circuitry for transforming data and for storing temporary data.
The data path contains ALU capable of transforming data through operations such as ( ADD, SUB MUL, AND, OR Etc.)
The ALU Also generates status signals and they are stored in PSW.
The data path contains the registers capable of storing intermediate data.
The intermediate data may include data brought in from memory but not yet sent through the ALU etc.
The internal data bus carries the data with in the data path.
The external data bus carries the data to and from the data memory.
A processor can be distinguished by its size.
Embedded Systems
Prof. Ramesh

5. Control Unit: The control unit has
The control unit consists of circuitry for retrieving program instructions and for moving data to and from and through the data path according to those instructions.
The control unit has
1. Program counter 2. Instruction register 3. Controller PC bit width ( Processor address size)
Clock cycle: it is the longest time required for data to travel from one register to another .
Critical Path:
The path through the data path or controller that results in this (Clock Cycle) longest time is called the critical path. The shorter the critical path the higher the clock frequency. With higher frequency the program execution is faster.
Embedded Systems
Prof. Ramesh

6. Basic architecture of the processor:
ALU
Registers
controller IR PC
Processor
Controller
Data path
Control/
status
I/O
memory
Embedded Systems
Prof. Ramesh

7. Harvard architecture:
Memory:
There are two types of architectures are used for memory
Harvard architecture
Princeton architecture
Harvard architecture:
The program memory space is distinct from the data memory space.
In a Harvard architecture it requires two connections. They can perform instruction and data fetch simultaneously.
This results in improved performance. Example of Harvard architecture is inte 8051
Program Memory
Data Memory
Processor
Embedded Systems
Prof. Ramesh

8. Princeton Architecture:
In this architecture the program and data words share the same memory space.
It results in simpler hardware connection to memory. Most of the machines follow the Princeton architecture.
Memory may be ROM, RAM or on chip memory or off chip memory The processor can access the on chip memory faster than the off chip memory.
Processor
Memory
(Program & Data)
Embedded Systems
Prof. Ramesh

9. Cache Memory:
To reduce the time needed to access memory a local copy of memory may be kept in a small but especially fast memory called cache.
Cache memory resides on chip and often uses fast but expensive static ram technology rather than slower and cheaper dynamic memory.
Caches are used for both program memory as well as data memory (I Cache , D cache).
Fast/expensive technology usually on the same chip
Processor
Cache
Cache memory
Memory
Slower/ cheaper technology usually on a different chip
Embedded Systems
Prof. Ramesh

10. Operation: Instruction Execution Pipelining
The following steps are considered in the operation phase
Instruction Execution
Pipelining
Super scalar and VLIW architecture
Embedded Systems
Prof. Ramesh

11. The steps involved in the instruction execution : Fetch instruction
Decode instruction
Fetch operands
Execute operation
Store results
Embedded Systems
Prof. Ramesh

12. Fetch instruction: Decode Instruction: Fetch Operands:
The task of reading the next instruction from memory into the instruction register is called the fetch instruction.
Decode Instruction:
The task of determining what operation the instruction in the instruction register represents that is add move etc. is called the decode instruction.
Fetch Operands:
The task of moving the instructions operand and data into appropriate registers is called fetch operands.
Embedded Systems
Prof. Ramesh

13. Store results: Execute operation:
The task of feeding the appropriate registers through the ALU and back into an appropriate register.
Store results:
The task of writing a register into a memory is called storing
Embedded Systems
Prof. Ramesh

14. PIPELINING: NO PIPELINING1 2 3 4 5 6 7 8
NO PIPELINING 1 2 3 4 5 6 7 8
Pipe lining is the common way to increase the throughput of a microprocessor. 8 7 6 5 4 3 2 1
Fetch instruction
Decode instruction
Fetch Operands
Execute
Store Results 12 11 10 9
PIPELINING
Embedded Systems
Prof. Ramesh

15. Super Scalar VLIW:
We can use multiple ALUs to increase the speed of a processor.
A super scalar processor can execute two or more scalar operations in parallel requiring two or more ALUs.
The scalar operation transforms one or two members.
The vector and matrix operations transforms entire set of numbers.
Super scalar micro processor require that the instructions must be ordered statically at compile time while the other may dynamically reorder the instruction to make use of ALUs.
A VLIW architecture is the type of static super scalar architecture that encodes several operations in a single machine instruction.
Embedded Systems
Prof. Ramesh

16. Programmer’s View Instruction Set Program and data memory space
Registers
i/o
Interrupts
Example assembly language programming
Embedded Systems
Prof. Ramesh

17. Instructions stored in memory
Opcode
Operand 1
Operand 2
Instruction 2
Instruction 3
Instruction 4
Embedded Systems
Prof. Ramesh

18. Addressing modes ADDRESSING MODE OPERAND FIELD REGISTER - FILE
CONTENTS
MEMORY
CONTENTS
Immediate
Data
Register Address
Memory Address
Memory address
data
Memory Address
Data
Memory address
data
Register Direct
Register Indirect
Direct
Indirect
Addressing modes
Embedded Systems
Prof. Ramesh

19. A Simple Instruction Set
Assembly Instruction
First Byte
Second Byte
Operation
MOV Rn,Direct
MOV Direct, Rn Rm
MOV Rn,#Immed
ADD Rn, Rm
SUB Rn, Rm
JZ Rn, Relative
0000 Rn
0001
0010
0011
0100
0101
0110
Direct Rm
Immediate
relative
Rn = M(direct)
M(Direct) = Rn
M(Rn) = Rm
Rn = Immediate
Rn = Rn + Rm
Rn = Rn – Rm
PC = PC + Relative
(Only if Rn is Zero)
Opcode
Operands
Embedded Systems
Prof. Ramesh

20. INPUT & OUTPUT:
The processor with input and output facilities communicate with other devices.
One common among I/O is parallel port and serial port
INTERRUPTS:
An interrupt causes the processor to suspend the main program and jump to an interrupt service routine that fulfills a special short term processing need.
Embedded Systems
Prof. Ramesh

21. Operating System
An operating system is a layer of software that provides Low-Level services to the application layer, a set of one or more program executing on the CPU consuming and producing input and output data.
The task of managing the application layer involves the loading executing of programs, sharing and allocating system resources to these programs and protecting these allocating resources from corruption.
Operating system is responsible for process scheduling, system call handling and other initializations.
System call it is the mechanism for an application to invoke the operating system.
The operating system abstracts away the details of the underlying hardware and provides the application layer an interface to the hardware and system calls.
Embedded Systems
Prof. Ramesh

22. Development Environment
Design Flow and Tools:
The general software tools that are used by embedded systems designer Several software and hardware tools commonly support the programming of general purpose processor.
Processors are identified as Development processors Target processor.
Development processors:
It is the processor on which we write and debug our program
Target processor: it is the processor to which we will send our program and it becomes the part of the embedded system
Embedded Systems
Prof. Ramesh

23. C File C File ASM File Assembler Compiler Binary file Binary file
Linker
Debugger
Library
Profiler
Exec.
File
Verification Phase
Implementation Phase
Embedded Systems
Prof. Ramesh

24. The IDE of an embedded system development tool consists of the following components
1. Assemblers
2.Compilers
3.linker
Assembler:
It translates the assembly instructions to binary machine instructions . In addition to it the assembler may also translates symbolic labels into actual addresses.
The mapping of assembly instructions to machine instructions is one-to-one.
Compiler:
It translates the structured program into machine programs. Structured programming languages poses high level constructs that greatly simplifies the programming.
Embedded Systems
Prof. Ramesh

25. Cross Compiler: Linker:
It executes on one processor but generates code for another processor and they are common in embedded system.
Linker:
It allows programmer to create a program in separately assembled or compiled files, It combines the machine instructions of each into a single program.
A linker designed for embedded system will also eliminate binary code associated with uncalled procedures and functions as well as memory allocated to unused variables in order to reduce the over all program foot print
Embedded Systems
Prof. Ramesh

26. Development Processor
Implementation
phase
Implementation
phase
verification
phase
Development Processor
Debugger/ISS
Emulator
External tools
Software design process
Desktop / Embedded
Programmer
Embedded Systems
Prof. Ramesh

27. Instruction set simulator for a simple processor
It is a program that runs on one processor and executes the instructions of another processor
Embedded Systems
Prof. Ramesh

28. Testing and Debugging
Testing and debugging is the major part of the overall design process. This especially true in case of embedded programming.
The program must be tested against the sample simulated data and it must work for the boundary values and must produce correct results.
For the embedded system programmers this must be a challenging task.
Program running on the embedded system works in conjunction with many other components of the system as well as interacts with the environment where the embedded system is to function.
The tools for testing the embedded system programmers are
Debuggers
Emulators
Device programmers
Embedded Systems
Prof. Ramesh

29. Debugger:
It helps the programmer to evaluate and correct the program. They run on the development processor and support step wise program execution.
They permit the programmer to execute the program up to a break point.
A source level debugger enables step by step execution in the source program language. It may be assembly language or structured language.
Since debuggers are programs that run on your development processor but execute code designed for the target processor.
The debuggers are also known as instruction set simulators or virtual machines.
Embedded Systems
Prof. Ramesh

30. Emulator:
Support debugging of a program while it executes on the target processor.
It consists of a debugger coupled with a board connected to a desktop processor through a cable.
The board consists of target processor.
In-circuit emulator:
It enables one to control and monitor the program execution in an actual embedded system. They are available for all processors.
Embedded Systems
Prof. Ramesh

31. Device programmer: The embedded system can be tested in three ways
It is used to down load a binary machine program from the development processor ‘s memory into the target processor’s memory.
Once the target processor has been programmed the entire embedded system can be tested in its more realistic form.
The embedded system can be tested in three ways
Debugging using
Emulation using emulator
Field testing by down loading the program directly.
Embedded Systems
Prof. Ramesh

32. Application Specific Processor
There are variety of applications that can use general purpose processors and the cost of them goes high.
Hence there is a need to develop the processors specific to a particular application.
Most the commercial groups in the market surveyed about it and developed the new family of processors called ASIP (Application Specific Instruction set Processors)
These ASIPs are instruction set processors where they can be programmed by writing software resulting in short time-to-market and good flexibility. While performance and other factors may be efficiently satisfied.
The ASIPs tend to come in three varieties, namely microcontrollers, which are specific to application and perform large amount of control tasks.
Digital signal processors that are specific to application and process large volume of data.
Less general ASIPs.
Embedded Systems
Prof. Ramesh

33. Microcontrollers: Features of microcontrollers:
They may include several peripheral devices such as timers, analog-to-digital converters, and serial communication devices on the same IC.
They include program and data memory on the same IC.
They may provide programmer with direct access to a number of pins to IC.
They may provide specialized instructions for common embedded system control operations such as bit manipulation operations
All the above mentioned things are available in microcontrollers hence they come under the category of ASIP.
Embedded Systems
Prof. Ramesh

34. Digital signal processors:
These processors are highly optimized for processing large amounts of data.
The sources for the data is digitized signals such as photo image captured by digital camera, voice packet going through the network.
The DSP contains the following:
Register files. Memory blocks, multipliers, Other arithmetic units
DSPs provide instructions that are central to digital signal processing, such as filtering and transforming, vectors and matrices of data.
Embedded Systems
Prof. Ramesh

35. They are frequently used for arithmetic functions such as multiply and accumulate are implemented in hardware and thus executes in orders faster than the software implementations.
DSPs allow execution of some functions in parallel resulting boost in the performance of the DSP system.
They also tend to incorporate many peripherals that are useful in signal processing.
Embedded Systems
Prof. Ramesh

36. GENERAL PURPOSE PROCESSOR DESIGN
The general purpose processor is a single purpose processor whose purpose is to process instructions stored in as program memory.
The real microprocessors intended for mass production are more commonly designed using custom methods rather than the general technique.
Design a general purpose processor having the basic architecture shown below.
The supporting instruction set also given
Embedded Systems
Prof. Ramesh

37. RF[rn]=RF[rn] + RF[rm] RF[rn]=RF[rn] - RF[rm]
Simple microprocessor FSMD is shown below.
Reset
Fetch
Decode
Mov 1
Mov2
mov3
mov4
Add
Sub JZ
0000
0001
0010
0011
0100
0101
0110
To fetch
RF[rn]=M[dir]
M[dir]= RF[rn]
M[rn]= RF[rrn]
RF[rn]=imm
RF[rn]=RF[rn] + RF[rm]
RF[rn]=RF[rn] - RF[rm]
PC=(RF[rn]=0)?rel:PC
PC = 0
IR = M[PC];
PC = PC + 1
From states below
Embedded Systems
Prof. Ramesh

38. FSM operations that replaces the FSMD operations after we create the data path.
PCclr = 1
MS = 10
Itld = 1
Mre = 1;
PCinc = 1;
RFwa=rn; RFwe=1; RFs=1;
Ms=01; Mre=1;
RFrla=rn;RFrle=1;
Ms=10; Mwe=1;
RFwa=rn; RFwe=1; RFs=00;
RFr2a=rm;RFr2e=1;Aus=00
RFr2a=rm;RFr2e=1;Aus=01
PC1d=ALUz
Embedded Systems
Prof. Ramesh

39. Architecture of simple microprocessor
Controller
( Next State and
control logic;
state Register ) PC IR
3 X 1 mux
2 X 1 mux
ALU
RF ( 16 )
RFs
RFwa
RFwe
RFrla
RFrle
RFr2e
RFr2a
ALUs
ALUz
Memory A B
Mre
Mwe Ms
RFw
RFr1
RFr2
PCld
PCinc
PCclr 16 2 1
To all
input
control
signals
From all
output
Control unit
Data path
Architecture of simple microprocessor
Embedded Systems
Prof. Ramesh

40. END
Embedded Systems
Prof. Ramesh