1. Week 11
Flip flop & Latches

2. Logic Circuits Logic circuits are classified into two groups
Combinational circuit
Sequential circuit
Basic building block of Combinational Circuit is Logic Gates, while indeed the basic building block of Sequential Circuit is Flip Flops

3. Sequential Circuit
The output of circuit depends on the previous output and the present inputs.
The inputs must follow a specific sequence to produce a required output.
In order to follow a sequence of inputs the circuits must contain some form of memory to retain knowledge of those inputs, which have already occurred.
This memory are obtained by feedback connections, which are made so that history of the previous inputs is maintained. Most sequential systems are based on a small number of simple sequential circuit elements known as Bistables or Flip Flops.

4. Flip flop
In digital circuits, the flip-flop, is a kind of bistable multivibrator
It is a Sequential Circuits / an electronic circuit which has two stable states and thereby is capable of serving as one bit of memory , bit 1 or bit 0.
Flip flop has better and greater usage in Shift Registers, Counters and Memory Devices
Flip flop is a storage device which store one bit data
It has two input and two output labeled as Q and Q’
Latch: it is also building block of sequentional circuit, which is constructed by the pair of, neither, neither crossed, coupled of NOR gate...
It is a digital storage device, serve as temporary buffer memory.
Flip Flop are used
For Memory circuits
For Logic Control Devices
For Counter Devices
For Register Devices

5. Types of flip flop There are three types of flip flop
Clocked S-R flip flop
D flip flop
J-K flip flop

6. S-R Flip Flop
It has two input S(set) and R(reset) and two output Q and Q’. In flip flop output are always opposite, if Q=1 then Q’=0.
In wiring diagram of R-S flip flop, there are two NAND gates.

7. S-R Flip Flop

8. Truth Table of R-S Flip Flop
Mode of operation S R Q Q’
Effect of output
Prohibited/Invalid 1
Prohibited do not use
Set
For setting Q to 1
Reset
For setting Q to 0
Hold
Depend on previous state

9. D - Flip Flop D stands for delay.
It has only one data input D and a clock signal (CLK).
Output are labeled as Q & Q’.
Notice that output Q follows input D after one clock puls (see Qn+1 column).
D flip flop may be formed as clocked signal R-S flip flop by adding an inverter.

10. J-K Flip Flop
J-K flip flop act as R-S flip flop except that it does not have a invalid state.
J & K does not mean any special but J is equivalent to set and K is equivalent to reset.
R=S=1 state has been replaced with a toggle state.
Toggle means the output will change to the opposite state (0 to 1 or 1 to 0) after every clock transition.
The JK is in R-S flip flop with feedback from Q & Q’.

11. Difference Between Flip Flop and Latch
Both are basic building blocks of sequentional circuit but there is suitable difference is;
A flip flop continuously checks its inputs and corresponding changes its output only at times determined by clocking the signal.
Where as latch is a device which continuously checks all its inputs and correspondingly changes its output, independent of time determined by clocking signal.

12. Difference Between Flip Flop and Latch …
A unique signal called “enable” is provided with latch.
The output changes only when
Enable signal is Active.
No change in output take place when
Enable signal is Inactive.
Flip flop are Edge Trigger (+ve or –ve transition)
Latches are Level Trigger (High or low).
A trigger is a control signal used to initiate an action.

13. Shift Register
Shift registers are type of sequentional logic circuits mainly for storage of digital data. The word shift means the device which shift data right or left. i.e. calculator
They are a group of flip flop connected in chain so that output from one flip flop becomes the input of next flip flop.
Most of the register posses no characteristics internal sequence of states.
All the flip flop are driven by common clock and all are set or reset simultaneously.

14. There are four types of shift registers;
Serial in, Serial out (SISO)
Serial in, Parallel out (SIPO)
Parallel in, Serial out (PISO)
Parallel in, Parallel out (PIPO)
Serial in Serial out
Serial in Parallel out
Parallel in Serial out
Parallel in Parallel out 1 1 1 1

15. Serial load shift register
The serial load shift register is constructed from four D flip flop. It is called four bit shift register because it has four place to store data A, B, C, D.
In table first clear (CLR input to 0) all output A, B, C, D to
This output remains same, while they are await a clock pulse. Pulse the CLK input once the output now will be 1000, again pulse clocking 1100.

16. Truth table Line no: Clear Data Clock pulse FF A FF B FF C FF D 1 2 32 3 4 5 6 7 8 9 10 11 12 13 14 15

17. Parallel load shift register
The serial load shift register, we studied last has two disadvantages;
It permits only one bit of information at a time
And it losses all its data out the right side when it shift right.
But in parallel load shift register given in figure it permits 4 bit at once, these inputs are data inputs A, B, C, D. This is just like rectangular feature, that would put output data back into so that is not lost.

18. Truth table Line no: Clear Data A Data B C Data D Clock pulse FF A
FF B
FF C
FF D 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

19. Application of shift register
There are so many applications of shift registers
To produce time delay,
To simplify combinational logic
To convert the serial data to parallel data.
Shift register have both parallel and serial input and outputs.
This is bi directional shift register which allow shifting to both direction LR or RL.