1. Number Systems and Circuits for Addition
Lecture 6
Section 1.5
Mon, Jan 30, 2006

2. Addition of Fixed-Length Integers
Represent 150 and 106 as 8-bit integers.
150 =
106 =
Express the sum as an 8-bit integer. =
Carry-out bit is thrown away.
Conclusions
= 0.
150 = –106.

3. Example: UnsignedInt.cpp

4. Two’s Complement
For binary numbers of fixed length n, the two’s complement of a is
2n – a
If a > 0, then –a is stored as the two’s complement of a.
The two’s complement of the two’s complement of a is a.

5. Finding the Two’s Complement
To find the two’s complement of an n-bit binary number:
Reverse each bit, including leading zeros.
Add 1 to the result.
Reversing each bit is equivalent to subtracting from 111…1 = 2n – 1.

6. It’s a Matter of Interpretation :
Signed
-128 to -1
Unsigned
0 to 255
Signed
0 to 127

7. It’s a Matter of Interpretation :
Signed
-128 to -1 +1
Unsigned
0 to 255 +1
Signed
0 to 127

8. It’s a Matter of Interpretation :
Signed
-128 to -1 –1
Unsigned
0 to 255 –1
Signed
0 to 127

9. Signed Integers Let P = {0, …, 127} Let N = {–128, …, –1}
High-order bit
Members of P have high-order bit = 0.
Members of N have high-order bit = 1.
Signed vs. unsigned
If n  P, then signed(n) = unsigned(n).
If n  N, then signed(n) = unsigned(n) – 256.

10. Some Special Values 0 = 00000000 127 = 01111111 –128 = 10000000
– 1 =
What value is ?
What value is ?
What value is ?
What value is ?

11. 2-Byte vs. 4-Byte Integers
Assign a short to an int.
Exactly what bits are copied to what locations?
The sign bit must be extended.
short s = -1;
int i = s;

12. Example: ShortVsInt.cpp

13. Addition of Signed Integers
Express negative numbers in two’s complement form.
Add, using the ordinary rules of addition.
Pay special attention to two bits:
The carry-in bit of the last column.
The carry-out bit of the last column.

14. Addition of Signed Integers
Eight cases a b
a + b
c-in
c-out
Valid P
yes N 1 no

15. Integer Overflow
If the result is too large to fit in the allotted space, the condition is called overflow.
Integer overflow occurs when
The sum of two positive integers is too large.
The sum of two negative integers is too large.

16. Integer Overflow
Integer overflow is detected when the carry-in bit does not match the carry-out bit.

17. Case P + P  N: An Example 80 + 90 = 01010000 + 01011010 = 10101010= =
= –
= –86
– 256 = –86

18. Case N + N  P: An Example (–80) + (–90) = 10110000 + 10100110
(–80) + (–90) = =
= 86
(–80) + (–90) = 86

19. Case P + N  P: An Example 90 + (–80) = 01011010 + 10110000 = 00001010
90 + (–80) = =
= 10
90 + (–80) = 10

20. Case P + N  N: An Example 80 + (–90) = 01010000 + 10100110 = 11110110
80 + (–90) = =
= –
= –10
80 + (–90) = –10

21. Intel x86 Status Flags

22. Intel x86 Status Register

23. Intel x86 Flags a b a + b CF SF OF 100 200 300 231-1 1 -231 -100 -200
231-1 1
-231
-100
-200 -1
-300

24. Intel x86 Condition Codes

25. Intel x86 Puzzler Explain why the combinations never occur.
CF = 1, SF = 1, OF = 1
CF = 0, SF = 0, OF = 1
never occur.