1. Immediate data
Immediate operands : ADD r3, r3, #1 valid ADD r3, #1,#2 invalid ADD #3, r1,r2 invalid ADD r3, r2, #&FF ( to represent hexadecimal immediate , use &)
Ox1234 uses 16 bits
For binary number: suffix the number with 0b
For octal number: suffix the number with 0
For hexadecimal numbers: suffix the number with 0x, 0X or &

3. Barrel Shifter
Barrel Shifter is a functional unit which can be used in a number of
different circumstances.
It provides five types of shifts and rotates which can be applied to Operand2.

4. Barrel Shifter
ASL: Arithmetic Shift left, this is synonym for LSL

5. Barrel Shifter

6. Examples of Barrel Shifter
MOV r0, r0, LSL # ; r0 = r0 * 21
MOV r1, r1, LSR # ; r1 = divide r1 by 4 (unsigned)
MOV r2, r2, ASR # ; r2 = divide r2 by 4 (signed)
MOV r3, r3, ROR# ; swap the top and bottom halves of r3
ADD r5, r5, r3, LSL #4 ; 4-address instruction
;r5 = r5+ r3 * 24

7. Operand 2

8. I bit in the instruction

9. If I bit is 0, operand 2 is Register
Registers shifted by values:
MOV r2, r2, LSR #1 ;shift r2 right by one bit
RSB r10 r5, r11, ASR #14 ;shift r11 right by14 bits while sign extending, then subtract r5 from that. Put the result in r10.
Registers shifted by registers:
BIC r11, r11, r1, LSL r0 ;take r1 and shift it left by r0, then use that as a mask to clear bits in r11. Put the result in r11
CMP r9, r8, ROR r0 ;take r8 and rotate it right by r0, then compare that with r9. the result is in flags

10. If I bit is 0, operand 2 is in register

11. If I bit is 1 – Immediate operand

12. Instruction format

13. What is the maximum value that can be represented by immediate operands?
12 bits -----> 2^12 -- 0 to (in other processors 16 bits for immediate operands, so 2^16)
But using 8 bits and shift operations(4 bits) can represent a 32 bit data

14. What are the different ways to represent operands ?
In Register, Immediate , barrel shifter …

15. Condition code

16. Eg - to set condition bits
Setting condition bits § Simply add an ‘S’ following the arithmetic/ logic instruction § Example: ADDS r0,r1,r2 (in ARM) This is equivalent to r0=r1+r2 and set the condition bits for this operation

17. Data Processing Instructions (3)
Conditional codes +
Data processing instructions
Barrel shifter =
Powerful tools for efficient coded programs

18. Data Processing Instructions (4)
e.g.:
if (z==1) R1=R2+(R3*4)
compiles to
CMP
ADDEQS R1,R2,R3, LSL #2
( SINGLE INSTRUCTION ! )

19. C

23. Instruction format