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Electrical Communications Systems ECE.09.433 Spring 2019
Lecture 9b March 28, 2019 Shreekanth Mandayam ECE Department Rowan University
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Plan Digital Baseband Communications Error Control Coding
Hamming distance Parity check codes Hamming Code
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ECOMMS: Topics
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Digital Communications Transceiver
Anti- aliasing Filter Data Encryption Encoder Error Control Encoder Source Encoder Channel/ Line Encoder Sampling Quantization MUX Modulator ADC Analog i/p CODEC MODEM Multiple access channel Analog o/p Data Encryption Decoder Error Control Decoder Audio Amp Reconstruction/ DAC Source Decoder Equalization / Decision Circuits DEMUX Demod-ulator
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Error Control Coding Error Detection Error Correction (ARQ Technique)
(FEC Technique) Hamming Distance The number of locations (bits) at which two code words differ Theorem 1 A code with a Hamming distance of d >= t+1 can detect t errors in the received code word Theorem 2 2t+1 <= d <= 2t+2 can detect and correct t errors in the received code word
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Error Control Codes Block Codes Convolutional Codes Block Coder
(memoryless) Convolutional Codes (with memory) Will not discuss! Principle Block Coder k information bits n encoded (n, k) systematic block code Information bits Parity bits k n-k n-bit codeword Add Redundancy!!
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Parity Check Codes P I4 I1 I2 I3 I5 I6 I7
P is set such that the total no. of bits in the code word is even or odd
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Remediation for Detected Errors: ARQ
1 Tx Rx 2 3 ACK NACK Error detected!!!
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(7, 4) Hamming Code I1 P1 P2 P3 I2 I3 I4
Single error detection and correction code Hamming distance, d = 3 Fits into a general category of coding techniques called BCH codes Employs a Code Generator Matrix Syndrome Decoding Technique
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(7, 4) Hamming Code Encoding Code Generator = Decoding Parity Check I1
Parity bits Code Generator I1 I2 I3 I4 I1 P1 P2 P3 I2 I3 I4 = Info bits C4 C1 C2 C3 C5 C6 C7 Code word Decoding Parity Check R4 R1 R2 R3 R5 R6 R7 s1 s2 s3 Received code word Error position indicator
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(7, 4) Hamming Code Code Generator Matrix
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Hamming Encoder + P1 P2 P3 I1 I2 I3 I4 P3 = I4 I2 I1
Info bits Parity bits P1 P2 P3 I1 I2 I3 I4 + P3 = I4 I2 I1 P2 = I4 I3 I1 P1 = I4 I3 I2
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Syndrome Decoding Parity Check Matrix
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Hamming Decoder + + + s3 = R7 R5 R4 R3 s2 = R7 R6 R4 R2
Received code word Error Position Indicator R4 R1 R2 R3 R5 R6 R7 s1 s2 s3 + + + s3 = R7 R5 R4 R3 s2 = R7 R6 R4 R2 s1 = R7 R6 R5 R1
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Error position indicator
Hamming Decoder Error position indicator (syndrome) s Error Position, e No error
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Summary
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