1. 6.0 Frequency Response 6.1 Introduction 6.2 Basic Concept
6.3 The Desibels
6.4 Low-Frequency Response
6.5 High-Frequency Response
6.6 Total Amplifier Frequency Response
6.7 Frequency Response of Multistage Amplifier

2. 6.1 Introduction
In previous analysis of amplifier circuits the reactance of the capacitors was assumed as 0Ω so no effect on amplifier gain or phase shift. Also internal transistor capacitance is small enough to neglect at operating frequency. This is valid when the amplifier freq is at midrange.
Capacitive reactance, Xc decrease with when freq increase and vice versa.
When frequency is low enough, internal, coupling and bypass capacitor can no longer be considered short because Xc become large enough to have a significant effect on amplifier.
Also, when frequency is high enough, internal, coupling and bypass capacitor can no longer be considered open because Xc become small enough to have a significant effect on amplifier.

3. 6.1 Basic Concept
Most amplifiers have finite range of frequencies in which it will operate. In previous analysis of amplifier Xc was assumed as 0Ω so no effect on amplifier gain, AV or phase shift. Also internal transistor capacitance is small enough to neglect at operating frequency. This is valid when the amp frequency is at midrange.
Here will discuss how the capacitor limits the passage of certain frequencies. This is called the frequency response of an amplifier. So the frequency response of an amplifier is the change in gain or phase shift over a specified range of input signal frequencies.

4. Effect of Coupling Capacitors
Reactance capacitance, Xc = 1/(2πfC) Xc varies inversely with freq. At low freq Xc is greater and it’s decrease as freq increase.
At low freq, more signal voltage drop across C1 and C3, because Xc are higher and this will reduce Av.
Phase shift is also introduce by C1 form a lead with Rin and C3 form a lead with RL||RC or RD. Lead circuit is an RC circuit in which Vout across R leads Vin in phase.
Fig 10-1a&b BJT & FET amps

5. Effect of Bypass Capacitor
At lower freq XC2 becomes significant and emitter (or source FET) is no longer at ac ground. XC2||RE(or RS for FET) create an impedance that reduce the gain, AV.
e.g. At high freq, XC = 0, Av = RC/r’e (Example for CE amplifier)
At low freq XC >> 0, so Av = RC/(r’e + Ze)

6. Effect of Internal Transistor Capacitance
At high freq capacitor becomes short and have no effect on amplifier response. But internal transistor junction capacitance, Cbe and Cbc (Cgs and C gd) will decrease Av and introduce phase shift as signal freq increase. Data sheet often refer Cbc as output capacitance (Cobo in datasheet) and Cbe as input capacitance (Cibo) (Example refer text book on page 179).
For FET data sheet normally specify input capacitance, Ciss and reverse transfer capacitance, Crss.
At low freq, internal capacitance have very high reactance because of their low capacitance normally a few pF). So they look like open and no effect on transistor performance.
Fig 10-3a&b Internal capacitance BJT&FET

7. As frequency increase, internal capacitance reactance decrease, so at some point they have significant effect on transistor performance. When XC(be) or XC(bc) become small enough, a significant voltage is lost due to voltage-divider effect of signal source resistance and XC(be).
When XC(bc) or XC(gd) become small enough, a significant amount of Vout is feedback to input (negative feedback), thus decrease Av.
Fig 10-6a&b ac eq circuits w/miller capacitances

8. Miller’s Theorem
Is used to simplify the analysis of inverting amplifier at high frequency where internal transistor capacitance are important.
It’s view the internal capacitances as external capacitors to understand the effect on frequency response.
Av is the absolute voltage gain of amplifier at midrange freq and capacitance is either Cbc or Cgd.
Miller theorem states that C effectively appears as a capacitance from input to ground, Cin(Miller) = C(Av + 1)
Cbc (Cgd) has much greater impact on input capacitance than its actual value.
E.g. if Cbc = 6pF,
Av = 50,
so Cin(Miller) = 6(50 +1)
= 306pF.

9. Miller theorem also state that C effectively appears as a capacitance from output to ground, Cout(Miller) = C((Av + 1)/Av)
So if Av = 10 or greater, Cout(Miller) = Cbc or Cgd
because (Av + 1)/Av approximate to 1

10. 6.2 The Decibel
Decibel is a common unit of measurement of Av and frequency response. Basic for decibel unit came from logarithmic response of human ear to intensity of sound. It is a logarithmic measurement of the ratio of one power to another or one voltage to another. Power gain express in decible (dB) is ;
Ap(db) = 10 log Ap where Ap = Pout/Pin
Voltage gain express in decible is, Av(db) = 20 log Av
If Av > 1, dB gain is positive
if Av < 1, dB gain is negative and called attenuation.

11. Zero dB Reference
Often certain value of amplifier gain,Av being assign as 0 dB reference, but it doesn’t mean that actual Av = 1 (20log1 = 0 dB); it mean the reference gain, no matter what its actual value.
Many amplifier exhibit a maximum gain over a certain range of freq and reduced gain at freq below and above this range. Maximum gain is called midrange gain and is assigned 0 dB value. Any value of gain below this is expressed as negative dB.
e.g. if midrange Av = 100
Av below mid range = 50,
so = 20log(50/100) = - 6 dB.
So halving Vout for steady Vin is always reduce 6 dB in gain and doubling Vout always increase 6 dB in gain.

12. Critical Frequency
Critical frequency also known as the cutoff or corner frequency is the frequency at which output power drops by 3 dB, which represents one-half of it’s midrange. ApdB = 10log(0.5) = - 3 dB
At critical frequency, the voltage is about 70.7% of its midrange value.
AvdB = 20log(0.707) = - 3 dB
Power is often measured in units of dBm. Term dBm means decibels with reference to 1 mW of power. When dBm is used, all power measurement are relative to a reference value of 1 mW.
A 3 dBm increase corresponds to a doubling of the power and a 3 dBm decrease corresponds to halving of the power.
e.g +3 dBm 2 mW (twice 1 mW)
-3 dBm 0.5 mW (half of 1 mW)

13. 6.3 Low-Frequency Amplifier Response
BJT Amplifier
Assume C1, C2 and C3 are ideal short for a typical CE configuration at midrange frequency, you can determine the midrange voltage using eq. below where Rc = RC||RL.
So midrange Av = Rc/r’e
Looking at low freq ac equivalent circuit, there are three high-pass RC circuits which will limit gain as the frequency is reduce below midrange frequency response.
Fig 10-9 low freq ac equivalent amp

14. Low frequency equivalent circuit retain the capacitor because Xc is not small enough to neglect when the signal frequency is sufficiently low.
First RC is formed by the input coupling capacitor and the input resistor of amplifier (RinC1), second output coupling capacitor and resistor looking in at the collector ( RoutC3) and third emitter bypass capacitor and resistance looking in at emitter (Rin(emitter)C2)
Fig 10-9 low freq ac equivalent amp

15. Input circuits RC
Input circuits RC is RinC1. As signal frequency decrease, XC1 increase. This causes less voltage across Rin at base because more voltage drop across C1 and this will made Av reduced.
Base voltage for input RC by neglect internal resistance of input signal source, Vbase = (Rin/sqrt(Rin2 +XC12)) x Vin
Critical point in amplifier response occurs when Vout is 70.7% of its midrange value. This condition occurs in input RC circuit when
XC1 = Rin.
Vbase = (Rin/sqrt(2Rin2) x Vin
= 1/sqrt(2) x Vin = 0.707Vin
Terms of decibles measurement;
20log(Vbase/Vin)
= 20log(0.707) = - 3 dB
Fig input RC circuit

16. Frequency at which gain is down by 3 dB is called the – 3 dB point of amplifier response. Overall gain is 3 dB less than at midrange freq because of attenuation of the input RC circuit.
This frequency, fc is called lower critical, lower cutoff, lower corner or lower break frequency.
XC1 = Rin = 1/(2 fcl(input)C1)
fcl(input) = 1/(2RinC1)
If input source resistance is considered; fcl(input) = 1/(2(Rs + Rin)C1)
Input RC circuit reduce overall Av of amplifier by 3 dB when frequency reduce to critical freq, fc. As frequency decrease below fc, Av decrease and it’s called roll-off. For each 10 times reduce in freq below fc, there is a 20 dB reduction in Av.
If f = 0.1fc, since XC1 = Rin at fc, then XC1 = 10Rin at 0.1fc because of the inverse relationship of XC1 and f.
attn = Vbase/Vin = Rin/(sqrt(Rin2 + XC12))
= Rin/(sqrt(Rin Rin2)

17. Rin/(sqrt(Rin2( ) = 1/10 = 0.1
dB attn = 20log(Vbase/Vin) = 20log(0.1) = - 20 dB
A ten-times change in frequency is called a decade. So, for the input RC, attenuation is reduced by 20 dB for each decade that frequency decrease below fc. This cause overall Av to drop 20 dB per decade. E.g. freq is decrease 1/100 of fc (a two decade decrease) amp Av drop 20 dB each decade, giving a total decrease in Av of
-20 dB dB = -40 dB.
Sometimes Av roll-off of amplifier is expressed in dB/octave rather than dB/decade. An octave correspond to a doubling or halving of the freq. E.g inc from 100 to 200 Hz is an octave, dec from 100 to 50 Hz also an octave. A rate of -20 dB/decade is approx equ to -6 dB/octave, dB/octave = -12dB

18. Input RC circuit phase angle, θ = tan-1(XC1/Rin)
RC circuit also causes increase phase shift through amplifier as freq decrease. At midrange freq, phase shift through input RC circuit is approximate zero because XC1 = 0 Ω. At lower frequency, XC1 higher cause a phase shift, so Vout RC circuit lead Vin.
Input RC circuit phase angle, θ = tan-1(XC1/Rin)
For midrange freq, XC1 = 0Ω, so θ = tan-1(XC1/Rin) = tan-1(0) = 00
At critical freq, XC1 = Rin, so θ = tan-1(XC1/Rin) = tan-1(1) = 450
A decade below critical freq, XC1 = 10Rin,
So θ = tan-1(XC1/Rin) = tan-1(10) = 84.30
Phase shift will through input RC circuit approach 900 as frequency approach zero. Voltage at base transistor lead the input signal voltage in phase below midrange by amount equal to circuit phase angle, θ as shown by diagram.
Fig dB voltage gain vs frequency graph

19. Phase shifting occurs at the lower frequencies as the capacitive reactance increase. This occurs in all of the capacitive parts of the circuits at low frequency.
Diagram below shows phase shift angle versus freq for the input RC circuit

20. The Output RC Circuit
Second RC circuit is formed by C3, the resistance looking in the collector and RL. Rout is looking in collector, transistor is treated as ideal current source (with infinite internal resistance) and upper end of RC is effectively at ac ground.
The critical frequency of output circuit, fcl(output) = 1/(2(RC + RL)C3)
The effect of output RC circuit on amp gain is same as input RC circuit. As signal freq dec, XC3 inc. So less voltage across RL because more voltage is dropped across C3. Signal voltage is reduce by a factor when freq is reduce to lower critical value, fc for the circuit. This correspond to 3 dB reduction in Av.
Fig 10-14a collector output circuit

21. Output RC circuit phase shift, θ = tan-1(XC3/(RC + RL))
θ = 00 for midrange freq and approach 900 as freq approach zero (XC3 approach infinity). At critical frequncy, fc phase shift, θ is 450.

22. Av =Rc/(r’e + Re) where Re = RE||XC2
Bypass RC circuit.
For midrange freq, assume XC2 = 0Ω, effectively shorting emitter to ground so that Av = Rc/r’e. As freq decrease, XC2 increase and no longer provides a sufficiently low reactance to effectively place emitter at ac ground. Av decrease because impedance from emitter to ground increase.
Av =Rc/(r’e + Re) where Re = RE||XC2
Bypass RC circuit is formed by C2 and resistance looking in at emitter, Rin(emitter) = (Ve/Ie) + r’e
=(Vb/βacIb) + r’e = (IbRth)/βacIb + r’e
= (Rth/βac) + r’e
Looking from C2 Rth/βac + r’e is in parallel with RE. So critical freq,
fcl(bypass) = 1/(2[(r’e + Rth/βac)||RE]C2)
Fig 10 15a&b bypass RC circuit

23. Bypass RC circuit.

24. Ex: Calculate fc of bypass RC circuit if r’e = 12Ω
Rth
Rin(emitter) fc

25. FET Amplifier
Zero-biased D-MOSFET amplifier midrange frequency Av; Avmid = ĝmRd
This is gain at frequency high enough so that capacitive reactance are approximate zero.
It has two RC circuit that influence its low freq response. One RC circuit is formed by C1 and input resistance. Other RC is formed by C2 and the output resistance looking at the drain.

26. Input RC Circuit
Just as BJT XC1 increase as frequency decrease. When XC1 = Rin, Av is down 3 dB below its midrange value.
The lowest critical freq, fc = 1/(2RinC1)
Rin = RG||Rin(gate) where Rin(gate) = |VGS/IGSS|
fc = 1/(2(RG||Ringate)C1)
Av roll off below fc at 20 dB/decade. The phase shift in low-frequency input RC circuit is ; θ = tan-1(XC1/Rin)

27. The Output RC Circuit
Second RC circuit that is affects low-frequency amplifier response is formed by C2 and Rout looking in at the drain, RD and RL.
fcl(output) = 1/(2(RD + RL)C2)
The effect of output RC circuit on amplifier Av below midrange is similar to input circuit. Circuit with highest fc dominates because it is the first causes the gain to roll off as the frequency drop below midrange value.
θ = tan-1(XC2/(RD + RL))
Again at fc, θ is 450 and approach 900 as freq approach zero. However starting at fc θ decrease from 450 and become very small as freq inc.

29. The Bode Plot
Bode Plot is a plot of dB Av versus frequency on semilog graph paper (logarithmic horizontal axis scale and a linear vertical axis scale).
There is flat 0 dB down to critical freq, at which point the gain drop at -20 dB. Above fc is midrange freq. It decrease gradually in midrange and down -3 dB at fc. Often, the ideal response is used to simplify amplifier analysis. fc, at which the curve breaks into a -20 dB/decade drop is sometimes called lower break frequency.

30. Total Low-Freq Response of an Amp
The combine effect of 3 RC circuit in BJT at low frequency (2 RC circuit in FET). Each circuit have their own fc determine by R and C values.
If one of fc RC circuit higher then the other two, then it is dominant RC circuit. It will determine the frequency at which overall gain of amp begin to drop at -20 dB. Other circuit each cause an additional -20 dB/decade roll-off below their fc.

31. Total Low-Freq Response of an Amp

32. At this break point, output RC circuit add another -20 dB to make a total roll-off of -40 dB/decade. This constant -40 dB/decade roll-off continue until bypass RC circuit fc is reached. At this break point, the bypass RC circuit add still another -20 dB/decade, making the gain roll-off at -60 dB/decade.
If all RC circuit have same fc, the response curve has one break point at that value of fc, and Av roll-off at -60 dB/decade below that value. Actually, midrange Av does not extend down to the dominant fc but is really at -9 dB below the midrange Av at that point (-3 dB for each RC circuit).

33. 6.4 High-Frequency Response BJT amplifier
In high frequency ac equivalent circuit, coupling and bypass capacitor are treat as effective short and do not appear in equivalent circuit. Cbc (Cibo – input capacitance) and Cbe (Cobo - output capacitance) which effective at high frequency do appear in diagram.
Applying Miller theorem and by using midrange voltage gain, Av looking in from signal source, Cbc appears in Miller input capacitance from base to ground.
Cin(Miller) = Cbc(Av + 1)

35. Cout(Miller) = Cbc((Av + 1)/Av)
Cbe appear as a capacitance to ac ground, in parallel with Cin(Miller). Looking in at collector, Cbc appears in Miller output capacitance from collector to ground and parallel with Rc.
Cout(Miller) = Cbc((Av + 1)/Av)
These two Miller capacitance create a high frequency input RC circuit and output RC circuit. They are differ from low frequency input and output circuit, which act as high pass filter because the capacitance go to ground and therefore act as low pas filter. The stray capacitance due to circuit interconnection are neglected.

36. Input RC Circuit
At high frequency, in input circuit βacr’e is the input resistance at base of transistor because the bypass capacitor effectively short the emitter to ground. By combining Cbe and Cin(Miller) in parallel and repositioning and by thevenizing the circuit to the left of the capacitor, as indicated,input RC circuit is reduced to the equ form.

37. As frequency increase, Xc become smaller
As frequency increase, Xc become smaller. So signal voltage at base decrease, so amplifier Av decrease because the capacitance and resistance act as voltage divider and as frequency increase, more voltage drop across resistance and less across the capacitance. At the critical frequency, Av is 3 dB less than its midrange value.
The upper critical high frequency of the input circuit fcu(input), is the frequency at which Xc is equal to total resistance.
Xc(tot) = Rs||R1||R2||βacr’e
So, 1/(2fcu(input)Ctot) = Rs||R1||R2||βacr’e
fc = 1/(2(Rs||R1||R2||βacr’e)Ctot)
where Rs is the resistance of the signal source
and Ctot = Cbe + Cin(Miller)
As frequency increase above fc, input RC circuit causes the gain to roll off at a rate of -20 dB/decade just as with low freq response.

38. Phase Shift
Vout lag Vin coz Vout of input RC circuit is across the capacitor.
Phase angle θ = tan-1((Rs||R1||R2||βacr’e)/Xc(tot))
At critical frequency, θ is 450 with signal voltage at transistor base lagging the input signal. As frequency increase above above fc, θ inc above 450 and approach 900 when frequency is sufficiently high.

39. Output RC Circuit
Output RC circuit is formed by Cout(Miller) and the resistance looking in at collector. In determine output resistance, transistor is treated as a current source (open) and one end of RC is effectively ac ground. Equation circuit can be made by arrange the position of capacitance in the diagram and thevenizing the circuit to the left.
The equation output RC circuit consist of RC||RL in series with Cout(Miller).
Cout(Miller) = Cbc((Av + 1)/Av)

40. fcu(output) =1/(2RcCout(Miller)) where Rc = RC||RL
If Av at least 10, so Cout(Miller) = Cbc
fcu(output) =1/(2RcCout(Miller)) where Rc = RC||RL
Output RC circuit reduce Av by 3 dB at fc same as input RC circuit. When freq inc above fc, Av drop at a -20 dB/decade rate.
Phase shift, θ = tan-1((Rc/Xcout(Miller))

41. FET Amplifier
The approach of high frequency analysis is similar to BJT amplifier. Only the differences are the specifications of internal FET capacitance and determination of input resistance.
For common source, coupling and bypass capacitor are assume to have negligible reactance and are considered shorts. The internal Cgs and Cgd appears in equivalent circuit because their reactance are significant at high frequency.

42. Cgd = Crss; Cgs = Ciss – Crss; Cds = Coss – Crss
From data sheet, Ciss, input capacitance, Crss reverse transfer capacitance and Coss, output capacitance. So for analysis;
Cgd = Crss; Cgs = Ciss – Crss; Cds = Coss – Crss
Coss sometimes is designated as cd(sub), drain to substrate capacitance, and if not available, neglect or assume a value.
By using Miller theorem, looking in from the signal source, Cgd effectively appears in the Miller input capacitance;

43. Cin(Miller) = Cgd(Av + 1)
Cgs appear as a capacitance to ac ground parallel with Cin(Miller).
Looking in at the drain, Cgd effectively appears in Cout(Miller) from drain to ground parallel with Rd.
Cout(Miller) = Cgd((Av + 1)/Av)
Cin(Miller) and Cout(Miller) contributes to high frequency input and output circuit and both are low pass filter which produce phase lag.

44. The Input RC circuit
High frequency input RC circuit form low pass filter because both RG and input resistance at gate of FET are extremely high, controlling resistance for input circuit is resistance of input source as long as Rs << Rin, because Rs||Rin when Thevenin is applied.
fcu(input) = 1/(2RsCtot) where Ctot = Cgs + Cin(Miller)
Phase shift for input RC circuit, θ = tan-1((Rs/XCtot)

45. The effect of input RC circuit is to reduce midrange gain, Av by 3 dB at fc and to cause Av to dec -20 dB/decade above fc.

46. Cout(Miller) =Cgd((Av + 1)/Av)
Output RC Circuit
The circuit is formed by Cout(Miller) and output resistance looking in at the drain, and FET is treat as current source as BJT. Using Thevenin, an equivalent output RC circuit consisting of RD||RL and an equivalent output capacitance.
Cout(Miller) =Cgd((Av + 1)/Av)
Critical frequency of output RC lag circuit, fcu(output) = 1/(2RdCout(Miller))
Phase shift for output RC circuit, θ = tan-1((Rd/Xcout(Miller))

47. Total High-freq Response of an Amplifier
As freq increase and reached high end of it’s midrange value, one RC circuit will cause Av begin to decrease and the frequency is called dominant upper critical freq; it is the lower of the two critical high freq.
In ideal, at fc(input), Av begin to roll off at -20dB/decade. At fc(output), Av begin to drop at -40 dB/decade because each RC circuit provide a -20 dB/decade.
In nonideal, Av is -3 dB below midrange at fc(input). Other possibilities is output RC is dominant or both circuit have same fc.

48. 6.5 Total Amplifier Frequency Response
In ideal response curve (Bode plot) for BJT, three break points at lower critical freq (fcl1, fcl2 and fcl3) are produce by 3 low-freq RC circuit formed by coupling and bypass capacitors. Two break points at upper critical freq fcu4 and fcu5 are produce by two high-freq RC circuit formed by transistor internal capacitance.
Two dominant fcl3 and fcu4 are where Av is 3 dB below its midrange value. These dominant freq are referred to as lower critical freq, fcl and upper critical freq fcu (sometimes called as half power frequencies)

49. Half-Power Point
The upper and lower critical freq are sometimes called half-power freq. Because Vout at fc is one-half of its midrange power. Where Vout is of its midrange value at fc.
V(out)fc = 0.707Vout(mid)
P(out)fc = V2(out)fc/Rout
= (0.707Vout(mid))2/Rout
= 0.5V2out(mid)/Rout
= 0.5Pout(mid)

50. Bandwidth, BW = fcu(dom) – fcl(dom)
Amplifier normally operate with freq between fcl(dom) and fcu(dom), where Vout is 70.7% of its midrange value or -3 dB. If signal freq drop below fcl, Av and Vout drop at 20 dB/decade until next fc is reached. The same occurs when input signal freq goes above fcu.
Bandwidth of amp is range (band) of frequency lying between fcl and fcu. Only dominant fc appear in response curve because they determine the bandwidth. Sometimes, other fc are far enough away from dominant frequency that they play no significant role in total amplifier response and can be neglected.
Bandwidth, BW = fcu(dom) – fcl(dom)
Ideally, all signal in BW are amplified equally .e.g. Vin = 10 mV, Av = 20, so Vout = 200 mV. Actually Av down 3 dB at fcl and fcu.

51. Gain-Bandwidth Product
Gain-badwidth product = AvBW is always constant when roll-off is -20 dB/decade.
If fcl(dom) << fcu(dom), then BW = fcu(dom) – fcl(dom) = fcu coz fcl is neglected.
Beginning at fcu, the gain roll-off until unity gain (0 dB) is reached. The frequency at which Av is 1 is called unity gain frequency, fT.
fT = Av(mid)BW
If fcl << fcu, then fT = Av(mid)fcu(dom)

52. 6.6 Frequency Response of Multistage Amplifier
When amplifier stages are cascaded to form a multistage amp, the dominant freq response is determined by the responses of the individual stages, where two cases to consider :
1. Each stage has a different lower critical freq and different upper critical freq.
2. Each stage has the same lower critical freq and same upper critical freq.
When fcl(dom) of each amp stage is different, the dominant lower critical freq, f’cl(dom) equals the fc of the stage with the highest fcl(dom).
When fcu(dom) of each amp stage is different, the dominant upper critical freq, f’cu(dom) equals the fc of the stage with the lowest fcu(dom).
Overall bandwidth, BW = f’cu(dom) – f’cl(dom)

53. Equal Critical Freq
When fcl(dom) of each stage is same, so the dominant lower critical freq increase by, f’cl(dom) = fcl(dom)/(sqrt(21/n – 1))
When fcu of each stage is same, so the dominant upper critical freq decrease by, f’ cu(dom) = fcu(dom)sqrt(21/n – 1)