1. Number Representation
and
ALU Operations

2. Outline Numbers and number representations Addition and subtraction
Logical operations
ALU
Multiplication
Division
Floating point numbers & arithmetic

3. Numbers & Representation
Radix based systems
b: base or radix (usually b = 2k in digital systems )
ai: digits (bits when b = 2) and 0  ai  b-1
How is the representation called when b = 2, 8, and 16?
more natural to computers
Example: 3749 = ( ) = (?) = (?)16

4. Representing Numbers ASCII – text characters Binary numbers
Easy to read and write information
2 x 3
2  ( )2 and 3  ( )2
Complex arithmetic & more storage
Binary numbers
Natural form for computers (easy arithmetic)
Requires formatting routines for I/O
( )2 ( )8
MSB
LSB
MSD
LSD

5. Number Types Unsigned integers Signed numbers (positive and negative)
In arithmetic operations which require only positive operands
In address calculations
Signed numbers (positive and negative)
Different representation methods
Floating numbers
Used to represent the real numbers in computers
Scientific and media processing applications requires floating point operations
Different precisions specified by IEEE 754 (single, double precision)

6. Signed Number Representation
Signed magnitude
One’s complement
Two’s complement
000 +0
001 +1
010 +2
011 +3
100 -0
111 -1
101
110 -2 -3 -4
What is 11100?

7. Numbers in MIPS 32 bit signed numbers:

8. Two's Complement Operations
Negating a two's complement number
Signed Extension:
MIPS 16 bit immediate is converted to 32 bits for arithmetic
copy the MSB into the extended bits
> ?
> ?
lbu vs. lb
To load ASCII characters from the memory, use lbu
lh – load half
lhu – load half

9. Signed vs. Unsigned Comparison
Different compare operations required for signed and unsigned types
Signed integer: slt set on less than
Unsigned integer: sltu set on less than unsigned
Example:
$s0 has
$s1 has
slt $t0, $s0, $s1 # signed comparison
sltu $t1, $s0, $s1 # unsigned comparison
$t0 = ? $t1 = ?
set-on-less-than instructions: slt, slti, sltu, sltui

10. Overflow They are different  overflow 0011 (3) + 1010 (-6) 1 1101
(-3)
=> no overflow
1011
(-5) +
1010
(-6) ??
1101
(-3) +
1010
(-6) 1
0111
(-9)
1011
(-5) +
0110
(6) ??
They are
different  overflow

11. Result indicating overflow
Overflow Conditions
 0
< 0
A-B
A+B
Result indicating overflow
Operand B
Operand A
Operation
< 0
 0
< 0
 0

12. Effects of Overflow
High level languages (such as C/C++) ignores overflows.
MIPS detects overflow
An exception (interrupt – unscheduled procedure call) occurs
Control jumps to a predefined address to invoke the appropriate routine for the exception
Interrupted address is saved for possible resumption
Don't always want to detect overflow
New MIPS instructions: addu, addiu, subu
they do not cause exceptions on overflow

13. Exception in MIPS There are three scenarios in exception handling:
Correct & return to program
Return to program with an error code
Abort the program
The address of the instruction that has caused the exception is stored in exception program counter (EPC).
Using move from system control (mfc0) instruction,
mfc0 $s1, $epc #$s1 = $epc
A jump register instruction is used to return to the offending instruction.
jr $s1

14. We can Trap Overflow addu $t0, $t1, $t2 # $t0 = sum, but no exception
xor $t3, $t1, $t2 # Check if their signs differ
slt $t3, $t3, $zero # $t3 = 1 if signs differ
bne $t3, $zero, No_overflow # their signs differ
xor $t3, $t0, $t1 # Check the sign of the result
slt $t3, $t3, $zero # $t3 = 1 if the result and one # of the operands’ signs differ
bne $t3, $zero, Overflow # signs differ # so there is an overflow
... Overflow: No_overflow:

15. Logical Operations Logical shift operations
Right shift (srl)
Left shift (sll)
Logical shift operations filled the emptied bits with 0s.
Example: sll $t2, $s0, 3
$s0 =
$t2 =
Instruction format 16 10 3 op rs rt rd
shamt
funct
unused

16. Arithmetic Logic Unit - ALU
ALU Operation 4
ALU 32 a b
Result
Zero
Overflow
CarryOut

17. ALU Control We use ALU to implement arithmetic/logic operations
ALU control lines
Function
0000
and
0001 or
0010
add
0110
subtract
0111
Set on less than
1100
NOR
We use ALU
to implement arithmetic/logic operations
to calculate addresses
to check branch conditions

18. Other Operations
Shift operation is done outside of the ALU using a circuit called barrel shifter.
A barrel shifter can shift an integer by the amount from 1 to 31 bits in both directions
it takes one clock cycle to shift independent of the shift amount
Other operations we do outside of ALU:
Multiplication
Division

19. Datapath of MIPS mult, multu rs Data Memory (Cache) rt Load Register
File
Barrel
Shifter
ALU
MDU
Store HI LO rd
mult, multu

20. Signed Multiplication
Basic approach is
Store the signs of the operands
Leave out the signs of the operand in the subsequent operations
Do the multiplication
Figure out the sign of the result
Is there a better approach?
Booth’s algorithm

21. Multiplication in MIPS
MIPS provides a separate pair of 32-bit registers to contain the 64- bit product
called HI and LO
Two instructions to get the product
mflo: move from LO
mfhi: move from HI
Example:
mult $s2, $s3 # (HI, LO) = $s2  $s3 mfhi $t # $t1 = HI mflo $t # $t0 = LO
Two multiply instructions: mult and multu
Multiply instructions ignore overflow

22. Multiplication in MIPSrs rt
0x18
mult rs, rt rs rt
0x19
multu rs, rt
Pseudo instructions:
mul rd, rs, rt # without overflow
mulo rd, rs, rt # with overflow
mulou rd, rs, rt # with overflow

23. Division More difficult than multiplication
Critical point: divide by 0.
Dividend = Quotient  Divisor + Remainder
Dividend
1000
Divisor -
1001
Quotient
00010
000101
Remainder

24. HI := Remainder(rs/rt)
Division in MIPS 1/2 rs rt
0x1A
div rs, rt
LO := Quotient(rs/rt)
HI := Remainder(rs/rt)
0x1B
divu rs, rt

25. Division in MIPS 2/2 div rd, rs, rt pseudo-instruction
rd := Quotient(rs/rt)
divu rd, rs, rt
pseudo-instruction
rd := Quotient(rs/rt)

26. Division by Signed Numbers
Ignore the signs first when dividing
Simplest solution is to keep the signs of divisor and dividend
when their signs disagree negate the result
Difficulty: the sign of the remainder
7  2 => Q = 3 and R = 1
(-7)  2 => Q = -3 and R = -1
(-7)  2 => Q = -4 and R = +1 (anomalous)
Rule: remainder and dividend must have the same sign.
7  (-2) => Q = -3 and R = +1
(-7)  (-2) => Q = 3 and R = -1

27. New Instructions in MIPS
Category
Instruction
Example
Meaning
Comments
Arithmetic
multiply
mult $s2, $s3
HI, LO=$s2$s3
64-bit signed
unsigned
multu $s2, $s3
64-bit unsigned
divide
div $s2, $s3
LO = $s2/$s3
HI = $s2%$s3
LO: Quo
HI: Rem
divu $s2, $s3
Unsigned quotient & remainder
move from high
mfhi $s1
$s1 = HI
copy HI
mflo $s1
$s1 = LO
copy LO

28. Floating-Point Numbers
We need to represent:
Real numbers e.g …
Large numbers that cannot be represented with 32-bit integers, e.g (number of atoms in the universe)
Very small numbers, e.g. 1.010-9 (1 nanosecond)
Floating point representation consists of
sign(S), exponent(E), and significand (f)
(-1)S  0.f  2E
more bits in significand gives more accuracy
more bits in exponent increases range
tradeoff between accuracy and range for fixed-length words

29. IEEE 754 Floating-Point Standard
single precision: 8 bit exponent, 23 bit significand
double precision: 11 bit exponent, 52 bit significand
In IEEE 754, the leading “1” is implicit. (-1)S  1.f  2E-bias
Form:
Arbitrary:  2E,  2E
Normalized:  2E
Exponent is biased
All 0s is the smallest exponent, all 1s is the largest
bias = 127 for single precision
bias = 1023 for double precision

30. Largest & Smallest in IEEE 754
Single precision
Largest: 1.111…11  = (2-2-23)  2127  2128  3.4  1038
Smallest: 1.00…0  =   10-38
Double precision
Largest: 1.111…11  = (2-2-52)   21023
Smallest: 1.00…0  =
There is a limitation to the numbers we can represent
Overflow: 269  270 = 2139
Underflow: 2-57  2-88 = 2-145

31. Why Biased Exponent? Signed exponents Biased notation:
signed magnitude: additional hardware to compare
two’s complement: with 1 in MSB a negative number look like larger than any positive number.
Biased notation:
(11…11) and (00…00) are reserved
(11…10) is the largest exponent
(00…01) is the smallest exponent
(11…10)-bias (largest positive exponent)
(00…01)-bias (smallest negative exponent)

32. IEEE 754 Floating-Point Standard
(–1)S  (1+0.f)  2E – bias
Example:
decimal: = -3/4 = -3/22
binary: = -1.1  2-1
floating point: exponent = 126 =
IEEE single precision: 1
sign
exponent
significand

33. Special Numbers Special numbers NaN, +, -
Divide by zero might give + instead of throwing an exception.
0/0 is a NaN.
Some numbers are reserved for representing special numbers

34. floating-point number
Special Numbers
Single precision
Double precision
Object represented
exponent
significand
Nonzero
denormalized number
1-254
Anything
1-2046
anything
floating-point number
255
2047
 
nonzero
NaN

35. Denormalized Numbers
Some very small numbers are allowed to be represented in denormalized form using denormalized numbers (denorms or subnormals).
their exponent is 0 (the same as 0)
(-1)S  0.f  (no hidden bit)
Smallest normalized number is ´
But the smallest denormalized number is ´ = 2-149
Programming is difficult with denormalized numbers.
Some computers even cause an exception.

36. Floating-Point Addition
Problem: two floating-point numbers with unequal exponents.
Solution: Significand of the number having the smaller exponent are right-shifted to equate their exponent
Significands are added.
Normalize the sum, if it is denormalized (i.e. having leading zeroes, etc.) by
Shifting right and incrementing the exponent
Shifting left and decrementing the exponent
Overflow or underflow?
Round the significand

37. Examples Simplified IEEE 754: Overflow: Underflow: 8-bit significand
4-bit exponent and bias = 7
max exp = 14-7 = 7
min exp = 1-7 = -6
Overflow:
a = ´ 27
c = 2´a = ´27 = ´28
Underflow:
a = ´2-5 and b = ´2-6
c = a-b = ( )´ = ´2-5 = ´2-14

38. Floating-Point Addition
Compare the exponents; Shift the significand with smaller
exponent to the right until exp_a = exp_b
start
Add significands
Normalize the sum: shift right and increment the exponent shift left and decrement the exponent
overflow or underflow
Test
exception
Round the significand to the appropriate number of bits
denormalized
still normalized
Test
done

39. Rounding Modes Four rounding modes supported by IEEE 754: Truncate
Round toward + (round up)
Round toward - (round down)
Round to nearest (even number) (default, useful in determining what to do when the number is exactly halfway between).

40. Example: Floating-Point Addition
A =  2EA
B =  2EB and EA = EB A 1. 1
Aligned B
C = A + B 0.
post-normalization
EC = EA + 1

41. How Many Extra Bits? 1/3 A = 1.00000101100  2EA
B =  2EB and EA - EB = 6 A 1. 1
Aligned B 0.
A - B
Postnormalization G A 1. 1
Aligned B 0.
A - B
Postnormalization
Wrong

42. How Many Extra Bits? 2/3 Guard bit (G) for accurate postnormalization
Sticky bit G S A 1. 1
Aligned B 0.
A - B
Postnormalization
Correct
Guard bit (G) for accurate postnormalization
Sticky bit (S) for borrow in subtraction

43. How Many Extra Bits? 3/3 A = 1.00000101100  2EA
B =  2EB and EA - EB = 6 A 1. 1
Aligned B 0.
A - B
Postnormalization G S A 1. 1
Aligned B 0.
A - B
Postnormalization
Rounding ????

44. Round Bit We need three extra bits for accurate arithmetic.1. 1
Aligned B 0.
A - B
Postnormalization G R S A 1. 1
Aligned B 0.
A - B
Postnormalization
Rounding
We need three extra bits for accurate arithmetic.
Guard (G), Round (R), Sticky(S)

45. Yet Another Example A = 1.00000010100  2EA
B =  2EB and EA - EB = 6 A 1. 1 B G R S
Aligned B 0.
A-B
Before rounding
round-to-nearest

46. One More Example
A =  2EA
B =  2EB and EA - EB = 6 A 1. 1 B G R S
Aligned B 0.
A-B
Before rounding
round-to-nearest

47. Floating Point Multiplication
Add the exponents
If the exponents are biased, subtract the bias from the result
Multiply the significands
Normalize the product if necessary
Shifting it right or left
Check overflow or underflow

48. Floating Point Multiplication
Simplified IEEE 754:
3-bit significand, 3-bit exponent and bias = 3
max exp = 6-3 = 3, min exp = 1-3 = -2
Example: A = 1.0102-1 and B = 1.10122 C = A  B = ?
EC = = 4
EC = 5

49. MIPS Floating-Point 32 fp registers $f0, $f1, …, $f31
They are used in pairs for double precision
Only even-numbered registers can hold the floating-point numbers.
Single precision
add.s $f2, $f4, $f6 # $f2 = $f4 + $f6
sub.s $f2, $f4, $f6 # $f2 = $f4 - $f6
mul.s $f2, $f4, $f6 # $f2 = $f4  $f6
div.s $f2, $f4, $f6 # $f2 = $f4 / $f6
Double precision
add.d $f2, $f4, $f6 # $f2 = $f4 + $f6
sub.d $f2, $f4, $f6 # $f2 = $f4 - $f6
mul.d $f2, $f4, $f6 # $f2 = $f4  $f6
div.d $f2, $f4, $f6 # $f2 = $f4 / $f6