1. Synchronization with DMT Modulation
Milos Milosevic
The University of Texas at Austin
ESPL
October 1, 1999

2. Discrete Multitone Modulation
IFFT
P/S
S/P
FFT
DAC
h(t)
ADC fs
FEQ
s(t)
Symbol
DMT Transceiver
2N samples n
Cyclic prefix

3. Delay D = integer part D + fractional part e sample synchronization
frequency alignment of RX and TX sampling clocks
estimates D
symbol synchronization
insures that proper symbols are fed to the FFT

4. The Effect of D *
h(t) n
Tone k T w
ideal synchronizer delays RX symbol clock 2 samples w/r to TX symbol clock

5. The Effect of e n
To FFT
Transmitted symbol
e=.5T
p/8
p/4
sample phase shift 0  e  T => rotation of FFT outputs
delay-rotor property

6. The Effect of Frequency Offset
RX clock fs - TX clock fs  Df  0 => frequency offset
timing error increases linearly, intercarrier interference (ICI) is generated
longer DMT symbols are more sensitive to Df
if Df not minimized the TX and RX clocks will desynchronize
Time
Df > 0
Df < 0 D +T -T
mth symbol
m + 1

7. Basic PLL Operation Dfk = Dfk+1+ bfk - frequency offset
cos(wlokT+qk)
fk= qk- qk
Phase detector + b +
cos(wlokT+qk)
Z-1
VCO
qk+1= qk+ kvcofkfk
Dfk = Dfk+1+ bfk frequency offset
qk+1= qk+ afk + Dfk - phase increment
fk phase error

8. Single Pilot Synchronization
pilot - sinusoid of a known mid-band frequency (ADSL ~ 64KHz)
bandpass filtering achieved using the FFT
gives a very accurate PLL reference input signal
RX modem samples at expected zero-crossings => phase error fk
the variance of the timing error can be estimated using w
SNR
pilot
wlo
spectrum
4p2fn2SNR 1
<<
se2
clock accuracy from 1-2% for ISDN down to 0.1% for ADSL

9. Phase Offset Correction
PLL produces a sampling phase offset f
The signal with timing error v( t+f ) => V( f ) e-j2p ff
single complex rotation of (2p/n)fn radians per carrier
simple, but not correct entirely; Df => all samples have different phase offset (wide-band signal)
f ~ average of all fn ; more accurate for a shorter symbol

10. Frequency Offset Correction
if Df  so that the induced delay  to one sample period T a sample is skipped/duplicated in the cyclic prefix
Df is adjusted accordingly
2N samples n
n-1
n+1
Duplicate process
Skip process
Duplicated sample
Skipped sample

11. Ad Hoc Symbol Synchronization
ML criterion not optimal; optimal max. capacity criterion - complex
try minimizing average ICI + ISI power V(D)  n w(n)h2[(n+D)T]
choose a window w(n) that will satisfy the desired criterion
estimate D
requires the knowledge of h(n)
w(n)
Window for min ICI+ISI 2N
2N+n n
h(t) D
w(n)
Window for ad-hoc low-complexity estimation n
w(n)
Window for NDA ML estimator n

12. Maximum Likelihood Symbol SynchronizationRX
2N+n
2N+n
2N+n n X X X S D
maximizing an AWGN likelihood function
search for D that produces the function maximum
not useful for e estimation

13. Sync Symbols known symbols embedded in the signal
used to determine the symbol being transmitted
in ADSL they occur every 69th frame (T1.413)
generated by pseudorandom binary signals mapped to 4-bit constellation
location determined using correlation maximum