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IA-64 Vincent D. Capaccio.

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Presentation on theme: "IA-64 Vincent D. Capaccio."— Presentation transcript:

1 IA-64 Vincent D. Capaccio

2 IA-64 Overview Hewlett-Packard and Intel
EPIC - Explicitly Parallel Instruction Computing 64-bit width Superscalar (Functional Units) Predication (Pre-computing branches) Speculation (Memory Hoisting) X86 is the ISA for Pentium… IA-64 is the ISA for the Itanium. Superscalar (parallel processing-functional units) Predication – Predicting the outcome of a conditional statement. Load both and get both answers. Then choose which path to take depending on the answer.

3 EPIC Explicitly Parallel Instruction Computing
Smaller instruction set then RISC. Room on chip for more functional units and registers. Relies on Compiler to extract parallelism.

4 Functional Units (Superscalar)
Computations completed in Parallel 6 Arithmetic Logic Units (ALU’s) 6 Specialized Multimedia Functional Units 1 Floating-Point Functional Units

5

6 Registers 128 64-bit General Purpose Registers
r0-r31 are Static, r32-r127 are Dynamic bit floating-Point Registers f0-f31 are Static, f32-f127 are Dynamic 64 1-bit Predicate Registers 8 Branch Registers At least 5 CUPID Registers

7 Predication (Pre-computing branches)
With x86 ISA - 20%-30% process performance is wasted on guessing which branch to take. IA-64 takes BOTH paths (NO guessing) Predicate registers are used to know which answer to throw away.

8 Speculation (Memory Hoisting)
Speculation is used to try to eliminate memory latency IA-64 looks ahead in code are loads data before it is needed.

9 Questions?


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