1. Amity School of Engineering & Technology
Amity Business School
Amity School of Engineering & Technology
ANALOG ELECTRONICS–I
Credit Units: 04
Course Instructor: Ashutosh Barua 1

2. ASET(Amity School of Engineering & Technology)
Schools
ASET(Amity School of Engineering & Technology)
Program & Semester
B.Tech-ECE III Semester (Batch-2017 to 2021)
Course Title
ANALOG ELECTRONICS- I
Course Code
BTC-302
Credit Unit 04
Faculty Name
Ashutosh Barua
Contact no.

3. Instruction Details Session hours : 4 hours per week
Total No. of Lectures Planned : 40
Self Study : 2 hrs per Session
Chamber Consultation Hours : As per the requirement
of the students

4. Course Objectives Course Objectives are as follows :
To give the idea about fundamental properties of semiconductors.
This course builds from basic knowledge of Semiconductor Physics to an understanding of basic devices and their models.
3. To prepare students to perform the analysis of any Analog electronics circuit.
4. To empower students to understand the design and working of BJT / FET amplifiers,
5. To prepare the students for advanced courses in Communication system Circuit Design.
6. This course builds a foundation for courses on VLSI design and analog CMOS IC Design.

5. Learning Outcomes Upon course completion, students will be able to:
Acquire basic knowledge of physical and electrical conducting properties of semiconductors.
2. Develop the Ability to understand the design and working of BJT / FET amplifiers.
3. Able to design amplifier circuits using BJT s And FET’s. and observe the amplitude and frequency responses of common amplifier circuits
4. Observe the effect of negative feedback on different parameters of an Amplifier and different types of negative feedback topologies.
5. Observe the effect of positive feedback and able to design and working of different Oscillators using BJTS.
6. Develop the skill to build, and troubleshoot Analog circuits.

6. Instruction Methodology
Lecture/Tutorials
PPT
Quiz
Projects on P-SPICE
Home assignment/Test
Blended Learning
Early Feedback Strategy

7. Suggested Text Books and References
Robert F. Pierret: Semiconductor Device Fundamentals, Pearson Education.
Millman and Halkias: Electronic Devices and circuits, Tata McGraw.
B.G. Streetman: Solid State Electronic Devices, 5th Ed., Prentice Hall,
R L Boylestad and Nachelsky: Electronic Devices & circuit Theory, 10th Ed.Pearson.
S.M.Sze: Semiconductor Devices: Physics & Technology, John Wiley, 2002.
Adel S. Sedra, Kenneth C. Smith : Microelectronics Circuits, 5th Ed., Oxford University Press, 2004

8. Module I: Semiconductor Diode and Diode Circuits
Course Content
Module I: Semiconductor Diode and Diode Circuits
Different types of diodes: Zener, Schottky,
LED.
Zener as voltage regulator,
Diffusion capacitance, Drift capacitance,
The load line concept,
Half wave, full wave rectifiers,
Clipping
Clamping circuits.

9. Module II: Bipolar Junction Transistor
Course Content……
Module II: Bipolar Junction Transistor
Bipolar junction transistor: Introduction,
Transistor, construction, transistor operations,
BJT characteristics,
load line, operating point, leakage currents, saturation and cut off mode of operations.
Bias stabilization: Need for stabilization, fixed Bias, emitter bias, self bias,
bias stability with respect to variations in Ico, VBE & , Stabilization factors,
thermal stability.

10. Course Content……
Module III: Small signal Analysis of transistor and Multistage Amplifier
Hybrid model for transistors at low frequencies,
Analysis of transistor amplifier using h parameters,
emitter follower,
Miller’s theorem, THE CE amplifier with an emitter resistance,
Hybrid model, Hybrid Conductance's and Capacitances,
CE short circuit current gain, CE short circuit current gain with RL Multistage amplifier:
Cascading of Amplifiers, Coupling schemes(RC coupling and Transformer coupling)

11. Course Content…… Module IV: Field Effect Transistors
Field effect transistor (JFET, MOSFET):
volt-ampere characteristics,
small signal model –common drain, common source, common gate, operating point,
MOSFET, enhancement and -depletion mode,
Common source amplifier, Source follower

12. Module V: Feedback Amplifiers
Course Content……
Module V: Feedback Amplifiers
Feedback concept,
Classification of Feedback amplifiers,
Properties of negative Feedback amplifiers,
Impedance considerations in different Configurations,
Examples of analysis of feedback Amplifiers.

13. Module V: Feedback Amplifiers
Course Content……
Module V: Feedback Amplifiers
Feedback concept,
Classification of Feedback amplifiers,
Properties of negative Feedback amplifiers,
Impedance considerations in different Configurations,
Examples of analysis of feedback Amplifiers.

14. Module VI: Power amplifiers
Course Content……
Module VI: Power amplifiers
Power dissipation in transistors,
difference with voltage amplifiers,
Amplifier classification (Class A, Class B, Class C, Class AB)
class AB push pull amplifier,
collector efficiency of each,
cross over distortion.

15. Tentative Lecture Delivery Schedule
Session
No.
Topic
Module No.
Continuous
Evaluation
Remarks 1
Overview of the subject and evaluation Criteria.
I-V 2
Introduction to Semiconductor I 3
PN Junction Diode 4 5
Diffusion capacitance, Drift capacitance 6
Schottky Diode, LED

16. Tentative Lecture Delivery Schedule
Session No.
Topic
Module No.
Continuous
Evaluation
Remarks 7
Zener diode,Zener diode as voltage regulator I 8
Problems based on Zener 9
The load line concept 10
Rectifiers: half wave 11
Rectifiers: Full wave & Bridge

17. Tentative Lecture Delivery Schedule
Session No.
Topic
Module No.
Continuous
Evaluation
Remarks 12
Clipping circuits I 13
clamping circuits 14
Problems on Clipping & Clamping circuits
Brief Summary of the Module-I will be presented to the students.
Topics for the Test No.-1 will be from the module-I.
Test No.-1

18. Tentative Lecture Delivery Schedule
Session No.
Topic
Module No.
Continuous
Evaluation
Remarks 15
Bipolar junction transistor: Introduction, Transistor construction II 16
transistor operations, BJT characteristics, saturation and cut off mode of operations 17 18
load line, operating point, leakage currents 19
Problems related to BJT on Q point, Basic problems 20
Bias stabilization: Need for stabilization

19. Tentative Lecture Delivery Schedule
Session No.
Topic
Module No.
Continuous
Evaluation
Remarks 21
fixed Bias, emitter bias, self bias II 22
Problems on biasing 23
bias stability with respect to variations in Ico, VBE & Beta, Stabilization factors,
Brief Summary of the Module-II will be presented to the students. 24
Hybrid model for transistors at low frequencies,
III

20. Tentative Lecture Delivery Schedule
Session No.
Topic
Module No.
Continuous
Evaluation
Remarks 25
Analysis of transistor amplifier using h parameters
III 26
emitter follower, Miller’s theorem, THE CE amplifier with an emitter resistance 27
Multistage amplifier: Cascading of Amplifiers, Coupling schemes(RC coupling and Transformer coupling) 28
Brief Summary of the Module-II will be presented to the students.
Topics for the Test No.-2 will be from the module-II & III
II & III
Test No.-2

21. Tentative Lecture Delivery Schedule
Session No.
Topic
Module No.
Continuous
Evaluation
Remarks 29
Field effect transistor (JFET): volt-ampere characteristics IV 30
MOSFET, enchantement and -déplétion mode, construction & working 31 32
signal model –common drain, common source, 33
Common source amplifier, Source follower

22. Tentative Lecture Delivery Schedule
Session No.
Topic
Module No.
Continuous
Evaluation
Remarks
Brief Summary of the Module-IV will be presented to the students. IV 34
Feedback concept, Classification of Feedback amplifiers V 35
Properties of negative Feedback amplifiers 36
Impedance considerations in different Configurations, Examples of analysis of feedback Amplifiers.

23. Tentative Lecture Delivery Schedule
Session No.
Topic
Module No.
Continuous
Evaluation
Remarks 37
Amplifier classification (Class A, Class B, Class C, Class AB) class AB push pull amplifier VI 38 39
Power dissipation in transistors 40
collector efficiency of each, cross over distortion
Brief Summary of the Module-VI will be presented to the students.

24. Academic Integrity Policy
Students are expected to follow the code of Conduct and Academic Behavior Standards as detailed in the Student regulations. Failure to comply with these rules may result in disciplinary actions as stipulated in the Students Regulations.

25. Evaluation Scheme S. No. Evaluation Component Weight (%)
Date for Evaluation
Learning Outcome Evaluated
Date of Completion of Evaluation 1
Test-1 5
Module-I
Within 3-4 days 2
Test-2
Module-II & IV 3
Class Test(Mid Semester Exam) 15
As per academic calendar
Module-I to III
Within a week 4
Attendance
Through out the semester
End-Semester Examination 70
As per University schedule
Module-I to V
Within a four working day after the ESE
Total
100

26. Component I – Test-1 (05 Marks)
Test -1 evaluates the students in terms of the following:
Concepts of Advanced Differentiation.
Ability to analyze a given problem and devise a solution to it.
Guidelines:
Problems will be given as per the course coverage in the class up-to 14 Lecture.
Actual Test will be of 10 Marks and it will be converted out of 5.
Questions will be only analytical.

27. Component II – Test-2 (05 Marks)
Test -1 evaluates the students in terms of the following:
Concepts of Advanced Differentiation.
Ability to analyze a given problem and devise a solution to it.
Guidelines:
Problems will be given as per the course coverage in the class from Lectures.
Actual Test will be of 10 Marks and it will be converted out of 5.
Questions will be only analytical.

28. Component III- Class Test (15 Marks)
Class Test is an individual activity which test students in terms of the following:
Ability to analyze a given problem or situation.
Knowledge of basic concepts or fundamentals and then
ability to apply them on a given situation.
Ability to follow logical path in problem solving.
By this component we can assess student- instructor performance. As laid down in the academic regulations, the class test is normally conducted at the mid of the semester. It serves the purposes of judging the student’s capability to integrate various fundamental principles and application aspects of the course.
No II Mid Semester will be conducted in any circumstances.

29. Component IV- Attendance (5 Marks)
It shall be the responsibility of a student to attend all the classes, to take prescribed quizzes, tests, examinations etc. and to submit, properly and promptly all assignments and home work.
A student should normally maintain 100% attendance in each of the course and minimum 75% without which he/she shall be disqualified from appearing in the End Semester Examination.

30. Component IV- Attendance (5 Marks)……
The evaluation scheme for attendance is as follows:
Attendance Marks
up to
greater than 75 and upto
greater than 80 and upto
greater than 85 and upto
greater than 90 and upto
greater than

31. Component V- End Semester Exam(70 Marks )
As laid down in the academic regulations, the end semester examination is conducted at the end of the semester and is comprehensive enough to include the whole course. It serves the purposes of judging the student’s capability to integrate and inter-link various fundamental principles and application aspects of the course. 31

32. Thank You