1. sRODdemo implementation
24/08/2019

2. Requeriments DSP Slices: GBT : RX (48) + TX(24) Memory:
10800 Slice registers (V )
45000 LUT (V7- ?)
17400 Slices occupied(V )
390 BRAM (36k each BRAM) (V )
Memory:
Pipelines= 12bits x 48 ch x 2 gains x 300 depth x 2 (security)= 690Kbits
Derandom= 16 evt x x 2 (security) = 300Kbits
TOTAL MEM (including BRAM from GBTs) = kbits (V/ Kbits)
DSP Slices:
PreProcessing: 48 ch x 7 samples = 336 DSP slices
Same for Optimal Filtering ( probably not needed)
Total : 700 DSP slices (V )

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