1. Pipelining

2. Pipelining Pipelining...?
Pipelining is an implementation technique in which multiple instructions are overlapped in execution
Multiple instructions are moved in execution cycle
Today, Pipelining is key to utilize each functional unit of processors
Pipelining results increase execution speed(Throughput)

3. Pipelining (cont..) A way of speeding up execution of instructions
overlap execution of multiple instructions

4. Pipelining (cont..)
The basic action of any microprocessor as it moves through the instruction stream can be broken down into a series of four simple steps, which each instruction in the code stream goes through in order to be executed:
• Fetch the next instruction from the address stored in the program counter.
• Store that instruction in the instruction register and decode it, and increment the address in the program counter.
• Execute the instruction currently in the instruction register. If the instruction is not a branch instruction but an arithmetic instruction, send it to the proper ALU
• Write the results of that instruction from the ALU back into
the destination register.

5. Pipelining (cont..)
There are two main ways to increase the performance of a processor through high-level system architecture
Increasing the memory access speed
Increasing the number of supported concurrent operations
Pipelining !
Parallelism ?
Pipelining is the process by which instructions are parallelized over several overlapping stages of execution, in order to maximize data path efficiency

6. Pipelining (cont..) Pipelining is analogous to many everyday scenarios
Car manufacturing process
Batch laundry jobs
Basically, any assembly-line operation applies
Two important concepts:
New inputs are accepted at one end before previously accepted inputs appear as outputs at the other end;
The number of operations performed per second is increased, even though the elapsed time needed to perform any one operation remains the same

7. Pipelining (cont..)
Looking at the textbook’s example, we have a 4-stage pipeline of laundry tasks:
Place one dirty load of clothes into washer
Place the washed clothes into a dryer
Place a dry load on a table and fold
Put the clothes away
Graphically speaking:
Sequential (top) vs.
Pipelined (bottom) execution

8. Pipelining (cont..)
Let us now introduce the pipeline we’re working with
It’s a 5-stage instruction, linear, static and scalar pipeline, consisting of the following steps:
Fetch instruction from Memory (IF)
Read registers while decoding the instruction (ID)
Execute the operation or calculate an address (EX)
Access an operand in data memory (MEM)
Write the result into a register (WB)
Again, theoretically, pipeline speedup = number of stages in pipeline

9. Pipelining •Makes for easier pipelining
– all instructions are the same length
– few instruction formats
– loads and stores are the only instructions with memory access
•Makes for more difficult pipelining
– structural hazards (like having only one memory unit)
– control hazards (we have to worry about branches)
– data hazards (when an instr. depends on a prev. instr.)

10. Single-Cycle Processor

11. Instruction Fetch

12. Instruction decode

13. Instruction execution

14. Store

15. Write Block

16. Instruction Pipeline Operation

17. Problem
In single cycle pipeline processor 9 instruction having 6 stages taken 54 clock cycles to complete execution
But in pipeline processor only takes 14 clock cycles to complete execution
T= [k + (n-1) ]
=[6+ (9-1)]
=14 time cycle

18. Conditional branch

19. Performance
• Pipelining improves performance by increasing instruction throughput
, not by decreasing execution time per instruction.
No Pipelining
Execution time = n x k x ts
k = # of stages
n = # of instructions
ts = time for each stage
With Pipelining (perfectly balanced stages)
Execution time = (k + (n-1)) x ts

20. Speedup

21. Pros & Cons

22. Comments Pipelining increase throughput (but not latency)
Hazards limit performance
Structural hazards
Control hazards
Data hazards

23. Pipelining
Pipelining doesn’t help latency of single task, it helps throughput of entire workload
Pipeline rate limited by slowest pipeline stage
Multiple tasks operating simultaneously
Potential speedup = Number pipe stages
Unbalanced lengths of pipe stages reduces speedup
Time to “fill” pipeline and time to “drain” it reduces speedup

24. The End