1. Optimal Co-design of FPGA Implementations for MPC
Bulat Khusainov
Supervisor: Dr Eric Kerrigan
Imperial College London
UKACC PhD Presentation Showcase

2. UKACC PhD Presentation Showcase
What is co-design?
MPC
algorithm
Hardware
Platform
co-design
MPC Controller
co-design
co-design
Plant
UKACC PhD Presentation Showcase

3. UKACC PhD Presentation Showcase
Why FPGA?
Control
unit
Reg 1
Cache L1,L2
Reg 2
Reg 3
ALU
DDR memory controller
CPU
FPGA
UKACC PhD Presentation Showcase

4. Multiobjective co-design problem
Co-design trade-offs
Time
Controller latency
Energy
Average chip power consumption
Space
Number of FPGA logic units
Multiobjective co-design problem
UKACC PhD Presentation Showcase

5. Hypervolume criterion
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6. UKACC PhD Presentation Showcase
Co-design example
UKACC PhD Presentation Showcase

7. Intermediate results and further plans
Current results:
Multi-objective co-design approach was applied to MPC design problem
Parallelization technique for solving MOO problem was proposed
Plans:
Investigate the idea of “any time” MPC controller
Apply co-design to nonlinear systems
UKACC PhD Presentation Showcase