1. FPGA Based Single Phase Motor Control Using Multistep Sine PWM Author Name1, Author Name2., Author Name3, (BE-Stream Name) Under the Guidance Of Guide Name1, Designation, College Name
Abstract
In industries, to control the operations of the drives, PWM inverters are used. They require large and complex triggering circuits to control the thermistors and IGBTs. The control is obtained by using DSP processors, which are less flexible due to their non-reconfigurable nature. Our work basically deals with controlling a single phase induction motor by H-cascaded multistep inverter .Multilevel cascade inverters are used to eliminate the bulky transformer required in case of conventional inverters. A 5 level H-cascaded multistep inverters are used because they produce common mode voltage, reducing the stress of the motor which doesn’t damage the motor and can draw input current with low distortion  FPGA is preferred over DSP processors because they are easily programmable by the users, flexible and requires less size .The sine PWM wave are used as triggering pulses for the switches in the multistep inverter. These SPWM signals is generated by comparing a low power sine wave reference with a high frequency triangular wave. These pulses are generated by the FPGA controller and then fed to multistep inverter. Input DC power supply is required for the inverter which is produced by the rectifier. The sinusoidal output of the inverter are passed through filter to reduce the harmonic distortion .Thus the output is fed for motor control. For the scalar control of the motor v/f control method is used where the ratio of frequency to voltage is kept constant to have constant flux and by varying the voltage and frequency we are to vary the torque and speed of the motor.
2.Introduction
Cascaded H-bridge inverter has a modularized layout and the problem of the dc link voltage unbalancing does not occur, thus easily expanded to multilevel. They have high power/high voltage applications too.
Multilevel inverters have advantage of its reduced number of switching switches compared to conventional similar inverters.
Xilinx field programmable gate arrays (FPGA's) are standard integrated circuits that can be programmed by a user to perform a variety of logic functions. Xilinx FPGA enables to produce prototype logic designs right in a short period. It is possible to create, implement, and verify a new design.
In this project we plan to design a 5 level inverter using sine PWM control. Since FPGA is easily configurable and it greatly reduces the size and bulkiness compared to traditional complex power electronics firing circuits.
3.Problem Statement
Design Multilevel inverter with FPGA based Multistep sine PWM controller for Output frequency 50 Hz to 100 Hz and Switching frequency 200 kHz To 750 kHz using Alternate Phase Opposition Disposition technique.
4. Proposed Methodology
Cascade 2 H bridges.(1 phase Inverters) for 5 levels
Generation of control signals using multistep sine
PWM method implemented on FPGA.
4 triangular waves is generated in APOD fashion and a reference sine wave is compared to each of the to generate the pulses using comparator. Triangular waves are generated using 4 up down counters. 4 pulses are generated. These pulses are given to the IGBTs of the inverter as firing pulses.
We can control the carrier frequency and the reference frequency to get different output.
By working in the switching range that we have decided for near sine output, we set out reference frequency between 200k-750k Hz and carrier frequency between Hz.
5. Simulations and Result
Figure.3. Control signal generation model
Figure.4. Simulated Output for carrier frequency 750 KHz
Carrier frequency
%THD
200KHz
63.28%
350KHz
56.70%
500KHz
47.58%
750KHz
16.9%
Figure.1. Single H bridge Inverter
We have analysed the THD values for various frequencies using the FFT analysis in the GUI.
The results are helpful for us to determine the suitable frequencies for optimum output results
Table.1. FFT analysis at Different Carrier Frequencies
6. Advantages
We see that there is reduction in Harmonics using Multilevel inverter.
THD value are reduced at higher frequencies.
We get a better sine wave at the output and motor control is fine and more efficient
7. Conclusion
Using AOPD fashion for 4 triangular waves helps reducing noise and distortion.
Using FPGA controller for the multilevel inverter we have a flexible design at the programming end. And using the multilevel inverter the control signals for the motor is better and improved according to the results shown above. 
Higher carrier frequency values are needed to choose in order to decrease the THD.
Figure.2. Algorithm of Proposed Controller
Using MATLAB Simulink THD values are obtained by varying triangular frequency.
The frequency which generates lowest THD is calculated using FFT analysis.
Now the modulation index can be changed to obtain different frequencies at output.
Generation of four triangular waves is done using up-down counter whereas look up tables are used to generate different sine waves.
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