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Pico-second TDC Schedule & Production

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Presentation on theme: "Pico-second TDC Schedule & Production"— Presentation transcript:

1 Pico-second TDC Schedule & Production

2 schedule Significant submission delay encountered.
Time and jitter critical design very delicate Underestimate of finalizing simple things: Simple things x large N = large time Memory integration issue Trainee supposed to help with design, verification and test left at very unfortunate time Integration of custom blocks Verification took longer than expected (always does) Prototype submission: August 2018 Initial bare die test: November - December 2018 At CERN only, to verify chip is alive Packaging of chips: Jan. – Feb. 2019 Testing of packaged chips: March. – April 2019 At CERN plus few selected users (Possible design corrections: May – June 2019) Production submission: July 2019 Production chip test/verification: September - October 2019 Chips available in quantity: October 2019

3 PicoTDC users and quantities (to be updated)
Project Test chips Final quantity Certainty CBM 10 3100 ? SuperFRS 2 100 Crispin CAEN LHCb Torch 1600 MPD/NA61 150 IHEP BESIIII 300 IHEP PET 200 CMS-TOTEM PPS CMS timing layer (10000) ATLAS forward proton 20 Mu2e Other ? (RD51, ?) Total <50 5k – 20k

4 Production scenarios, cost estimate
Masks, engineering run and packaging are dominating costs: Prices in CHF/Euro/$ 12inch wafer (4kCHF) = 3.5k PicoTDCs per wafer ½ or ¼ if shared masks and process split Dedicated engineering. run: ~500k CHF, low metal layer count Shared engineering run: ~250k CHF (could be less if several clients) Packaging + test: ~10 CHF per chip Yield: ~2/3 Dedicated engineering run: Eng run 5 wafers: 500k CHF Chips: 5 x 3.5k 17k, ~10k working Packaging/test: 17k x k, CHF Cost per chip: 670k / 10k 67 CHF per chip Price ~150 CHF per chip assuming half sold, for non commercial Shared engineering run Eng run 5 wafers: 250k CHF Chips: 5 x 3.5/2 k 9k, ~6k working Packaging/test: 9k x 10 90k CHF Cost per chip: 340k / 6k 57 CHF per chip Production run: Only after Engineering run 25 wafers: 100k CHF Chips: 25 x 3.5k 90k, 60k working, half if shared run Packaging/test: 90k x 5 450k CHF Cost per chip: 550k / 60k 10 CHF per chip, double if shared run Realistic scenario: 10/6 k working chips produced, 5K assured to be sold Non commercial sales price: 150 CHF/E/$ per chip, Non commercial 2.3 CHF/E/$ per channel Commercial use: To be negotiated on case by case


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