1. Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/
Semiconductor Device Modeling and Characterization EE5342, Lecture 20 -Sp 2002
Professor Ronald L. Carter
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2. Equivalent circuit above OSI
Depl depth given by the maximum depl = xd,max = [2eSi|2fp|/(qNa)]1/2
Depl cap, C’d,min = eSi/xd,max
Oxide cap, C’Ox = eOx/xOx
Net C is the series comb
C’Ox
C’d,min
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3. MOS surface states** p- substr = n-channel
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4. n-substr accumulation (p-channel)
Fig 10.7a*
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5. n-substrate depletion (p-channel)
Fig 10.7b*
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6. n-substrate inversion (p-channel)
Fig 10.7*
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7. Ideal 2-terminal MOS capacitor/diode
conducting gate,
area = LW
Vgate=VG
-xox
SiO2 y L
silicon substrate
tsub
Vsub=VB x
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8. Band models (approx. scale)
metal
silicon dioxide
p-type s/c Eo
qcox
~ 0.95 eV Eo Eo
qcSi= 4.0eV
qfm= 4.28 eV for Al Ec
qfs,p
Eg,ox
~ 8 eV
EFm Ec
EFp
EFi Ev Ev
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9. Flat band with oxide charge (approx. scale)
SiO2
p-Si
+<--Vox-->-
q(Vox)
Ec,Ox
q(ffp-cox)
q(fm-cox) Ex
Eg,ox~8eV
EFm Ec
EFi
EFp
q(VFB) Ev
VFB= VG-VB, when Si bands are flat Ev
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10. Values for gate work function, fm
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11. Values for fms with metal gate
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12. Values for fms with silicon gate
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13. Experimental values for fms
Fig 10.15*
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14. Calculation of the threshold cond, VT
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15. Equations for VT calculation
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16. Fully biased n-MOS capacitorVG
Channel if VG > VT VS VD
EOx,x> 0 n+
e- e- e- e- e- e- n+
p-substrate
Vsub=VB
Depl Reg
Acceptors y
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17. Effect of contacts, VS and VD
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18. Computing the D.R. width at O.S.I.Ex
Emax x
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19. Computing the threshold voltage
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23. Fully biased MOS capacitor in inversion
Channel
VG>VT
VS=VC
VD=VC
EOx,x> 0 n+
e- e- e- e- e- e- n+
p-substrate
Vsub=VB
Depl Reg
Acceptors y
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24. Flat band with oxide charge (approx. scale)
SiO2
p-Si
+<--Vox-->-
q(Vox)
Ec,Ox
q(ffp-cox)
q(fm-cox) Ex
Eg,ox~8eV
EFm Ec
EFi
EFp
q(VFB) Ev
VFB= VG-VB, when Si bands are flat Ev
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25. Flat-band parameters for n-channel (p-subst)
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26. MOS energy bands at Si surface for n-channel
Fig 8.10**
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27. Fully biased n- channel VT calc
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28. References
* Semiconductor Physics & Devices, by Donald A. Neamen, Irwin, Chicago, 1997.
**Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986
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