1. Chapter 5 Input/Output
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved

2. Overview OS controls I/O devices =>
Issue commands,
handles interrupts,
handles errors
Provide easy to use interface to devices
Hopefully device independent
First look at hardware, then software
Emphasize software
Software structured in layers
Look at disks
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved

3. I/O Device types Block device & Character Device Block Device
Stores information is fixed block
Transfer are in unit of one or more blocks
Blocks are addressable
Have seek operation
Eg: CD, HD, USB Stick, RAM
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved

4. I/O Device types Contd.. Character Device
Deliver or accept stream of character
No Block
Not addressable
No seek operation
Eg: Printer, Mouse, Keyboard, VDU etc..
Not everything fits
Eg. Clock
Simply cause interrupt at well defined interva;
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved

5. I/O Devices Some typical device network, and bus data rates.
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved

6. Device Controllers
I/O unit has 2 components-mechanical, electronic (controller)
Controller is a chip with a connector which
plugs into cables to device
Disk
Disk might have 10,000 sectors of 512 bytes per track
Has preamble, 4096 bits/sector, error correcting code
Preamble has sector number, cylinder number, sector size….
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved

7. Device Controllers
Controller assembles block from bit stream, does error correction, puts into buffer in controller
Blocks are what are sent from a disk
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved

8. DMA
A special control unit is used to transfer block of data directly between an external device and the main memory, without intervention by the processor.
CPU COULD request data one byte at a time from I/O controller
Big waste of time, use DMA
DMA controller on mother-board; normally one controller for multiple devices
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved

9. When DMA is not used Controller reads a block into its memory
Computes checksum
Interrupts OS
Sends byte at a time to memory
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved

10. DMA illustration Step Description 1
Device driver is instructed to transfer disk data to a buffer address X. 2
Device driver then instruct disk controller to transfer data to buffer. 3
Disk controller starts DMA transfer. 4
Disk controller sends each byte to DMA controller. 5
DMA controller transfers bytes to buffer, increases the memory address, decreases the counter C until C becomes zero. 6
When C becomes zero, DMA interrupts CPU to signal transfer completion.

11. Operation of a DMA transfer.
How does DMA work?
Operation of a DMA transfer.
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved

12. DMA controller modes
Cycle stealing mode-transfer goes on word at a time, competing with CPU for bus cycles. Idea is that CPU loses the occasional cycle to the DMA controller
the entire block of memory is copied to the destination as a single contiguous block. For the entire duration of the transfer, the CPU stays idle and the DMA controller and the peripheral device gets complete access to the system buses.
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved

13. DMA controller modes
Cycle Stealing mode: Similar to Burst Transfer mode, but instead of the data being transferred all at once, it is transferred one byte at a time. 
The DMA controller, after transferring one byte of data, releases control of the system buses by sending a bus grant signal through the control bus, lets the CPU process an instruction and then requests access to the bus by sending the bus request signal through the control bus and then transfers another byte of data. 
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved

14. Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved

15. Draw Grantt chart and calculate average waiting time and turnaround time using
FCFS
SJF
SRTN
RR with QT=2