1. Lecture 2: Limiting Models of Instruction Obeying Machine
虞台文
大同大學資工所
智慧型多媒體研究室

2. Content
Machine Simulation and Equivalence
Unlimited-Register Machine

3. Lecture 2: Limiting Models of Instruction Obeying Machine
Machine Simulation and Equivalence
大同大學資工所
智慧型多媒體研究室

4. Computer as a Partial Function
M  a machine
  an M-program
 an encoding function
 a decoding function e d
input
output

5. Computer as a Partial Functiond
input
output

6. Machine Equivalence
Input
(X)
Output
(Y)

7. Machine Equivalence
Input
(X)
Output
(Y)

8. Machine Equivalence
Input
(X)
Output
(Y)

9. Machine Equivalence
Input
(X)
Output
(Y)

10. Machine Equivalence
Input
(X)
Output
(Y)

11. Machine Equivalence Defined
two machines
Memory sets of M1 and M2.
M1-program
M2-program
g, h such that g h

12. Machine Equivalence Defined
Let can be computed on M1 using , i.e.,
encoding function
f can be computed on M2 using ’, with
decoding function
g, h such that g h

13. Machine Simulation Defined
A machine M2 simulates M1 if
such that
we can specify an algorithm which given any program  produces ’ satisfying

14. Machine Simulation Defined
What is the algorithm?
How to find g and h?
Problems:
Machine Simulation Defined
A machine M2 simulates M1 if
such that
we can specify an algorithm which given any program  produces ’ satisfying

15. Theorem A machine M2 simulates M1 if such that
The memory encoder g has to be one to one.
M2 simulates M1
Theorem
A machine M2 simulates M1 if
such that
we can specify an algorithm which given any program  produces ’ satisfying

16. Theorem Pf) : The memory encoder g has to be one to one.
M2 simulates M1
Theorem
Pf)
M2 simulates M1
START
HALT :
Identity
Consider
Suppose that g is not one to one.
Then, g(m1) = g(m2) = M for some m1m2.

17. Stepwise Simulation F: the set of operation functions of M1.
P: the set of predicates of M1.
Stepwise Simulation
M2 stepwise simulates M1 if
 1-to-1 encoding function g:M1M2 such that
1) For each FF,
 a program F in M2 such that
2) For each PP,
 a program P in M2 such that
and P doesn’t change M2.

18. Stepwise Simulation F: the set of operation functions of M1.
P: the set of predicates of M1.
Stepwise Simulation
M2 stepwise simulates M1 if
 1-to-1 encoding function g:M1M2 such that
1) For each FF,
 a program F in M2 such that
2) For each PP,
 a program P in M2 such that
and P doesn’t change M2.

19. Stepwise Simulation P P F: the set of operation functions of M1.
P: the set of predicates of M1.
Stepwise Simulation
M2 stepwise simulates M1 if
 1-to-1 encoding function g:M1M2 such that
1) For each FF, P
true
false
true
false P
 a program F in M2 such that
2) For each PP,
 a program P in M2 such that
and P doesn’t change M2.

20. Stepwise Simulation
M2 stepwise simulates M1
M2 simulates M1

21. SR4 Memory set  4 registers (x1, x2, x3, x4) Operations
for i = 1, 2, 3, 4.
Predicates
for i = 1, 2, 3, 4.

22. Review PC Memory set  2 registers (x, y) Operations Predicates
Dose PC Simulates SR4?
Review PC
Dose SR4 Simulates PC?
Memory set
 2 registers (x, y)
Operations
Predicates

23. Prove PC Simulates SR4 To be shown Exercise Step 1:
Define a 1-to-1 encoding function
Step 2:
For each FFSR4, find a F on PC such that …
To be shown
Step 3:
For each PPSR4, find a P on PC such that …
Exercise

24. SR4 PC

25. START
false
true
HALT

26. Exercise

27. 2 | x? false true 2 | x? yx x0 true false START FALSE HALT TRUE HALT

28. Prove PC Simulates SR4 Why? To be shown Exercise
In fact, SR2 also simulates SR4.
Why?
Prove PC Simulates SR4
Step 1:
Step 2:
Step 3:
Define a 1-to-1 encoding function
For each FFSR4, find a F on PC such that …
For each PPSR4, find a P on PC such that …
To be shown
Exercise

29. Discussion PC SR4 SR SR2 Is SR more powerful than SR2? No.
Is SR more powerful than PC?
Not sure, now.
Discussion PC
SR4
SR
SR2

30. Lecture 2: Limiting Models of Instruction Obeying Machine
Unlimited-Register Machine
大同大學資工所
智慧型多媒體研究室

31. The Unlimited-Register Machine
Unlimited number of registers.
Unbounded capacity of every register.
Powerful instructions

32. The Machine R Memory set Operations Predicates
That is, for some, k  1, ni = 0 for all i  k
(finite memory are used).
Operations
Predicates

33. Input & Output Registers of R
k input
registers
l output
registers
Other registers can be working registers if necessary.

34. Running R
 : a program in R
e : encoder
d : decoder

35. SR
Memory set
 The same as R
Operations & Predicates
i = 1, 2, …

36. SR R Machine Simulations Simulates? Simulates? Of course.
Not sure, now.

37. Prove SR Simulates R
Step 1:
w working registers
Step 2:
Step 3:

38. Converted to register-mode operation by using a working register.
Prove SR Simulates R
Step 1:
w working registers
Converted to register-mode operation by using a working register.
Step 2:
Step 3:

39. Prove SR Simulates R  >  =   true false START TRUE HALT FALSE

40. Prove SR Simulates R y  xk y>0 ? xi  0 y  y  1 y  xj
HALT
START
y  xk
y>0 ?
xi  0
xi  xi + xj
true
false
y  y  1
HALT
START
y  xj
xk>0 ?
xi  0
y  y  xk
true
false
xk>y ?
y  0
xi  xi + 1

41. Prove SR Simulates R y  xk y>0 ? xi  xj y  y  1 y  xk
HALT
START
y  xk
y>0 ?
xi  xj
true
false
xi  xi + 1
y  y  1
HALT
START
y  xk
y>0 ?
xi  xj
true
false
xi  xi  1
y  y  1

42. Prove SR Simulates R y  0 xi  0 y xi + xj xj>0? xi  y y>0?
HALT
START
y  0
xj>0?
xi  0
true
false
xj  xj  1
xi  xi + 1
y  y + 1
y>0?
xj  xj + 1
y  y  1
HALT
START
y xi + xj
xi  y
y  0

43. Prove SR Simulates R xj > xi? y  xi xj y>0 ? xi > xj?
START
false
TRUE
HALT
FALSE
true
xj > xi?
xi > xj?
START
y  xi xj
y>0 ?
true
TRUE
HALT
FALSE
false

44. Exercise
Using SR to Simulate R, at least how many working registers are required?

45. Discussion PC
SR4
SR2
SR R

46. Discussion
Machine equivalence is reflexive, symmetric, and transitive, i.e., an equivalence relation.
SR2 is the same powerful as R.
To study computation, considering PC, SR2, SR4, SR or R is equally well.
The above machines are register machines.

47. Register Functions Use x1, …, xk as input registers of R.
Let fi: Nk  N be the function computed by an R-program  using xi as the output register.
We call the k functions f1, …, fk the (k-adic) register functions of .
We will considered register functions (the class of all k-adic, k1, register functions) to be functions that are computable by R.

48. Examples
START
x1  x3  5
x2  x1 + x3
HALT