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Professor Ronald L. Carter

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Presentation on theme: "Professor Ronald L. Carter"— Presentation transcript:

1 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/
Semiconductor Device Modeling and Characterization – EE5342 Lecture 35 – Spring 2011 Professor Ronald L. Carter

2 Flat-band parameters for p-channel (n-subst)
©rlc L35-29Apr2011

3 Fully biased p- channel VT calc
©rlc L35-29Apr2011

4 p-channel VT for VC = VB = 0
Fig 10.21* ©rlc L35-29Apr2011

5 Ion implantation ©rlc L35-29Apr2011

6 “Dotted box” approx ©rlc L35-29Apr2011

7 ©rlc L35-29Apr2011

8 Mobilities ©rlc L35-29Apr2011

9 Differential charges for low and high freq
From Fig 10.27* ©rlc L35-29Apr2011

10 Ideal low-freq C-V relationship
Fig 10.25* ©rlc L35-29Apr2011

11 Comparison of low and high freq C-V
Fig 10.28* ©rlc L35-29Apr2011

12 Effect of Q’ss on the C-V relationship
Fig 10.29* ©rlc L35-29Apr2011

13 n-channel enhancement MOSFET in ohmic region
0< VT< VG Channel VS = 0 0< VD< VDS,sat EOx,x> 0 n+ e-e- e- e- e- n+ Depl Reg p-substrate Acceptors VB < 0 ©rlc L35-29Apr2011

14 Conductance of inverted channel
Q’n = - C’Ox(VGC-VT) n’s = C’Ox(VGC-VT)/q, (# inv elect/cm2) The conductivity sn = (n’s/t) q mn G = sn(Wt/L) = n’s q mn (W/L) = 1/R, so I = V/R = dV/dR, dR = dL/(n’sqmnW) ©rlc L35-29Apr2011

15 Basic I-V relation for MOS channel
©rlc L35-29Apr2011

16 I-V relation for n-MOS (ohmic reg)
ID non-physical ID,sat saturated VDS,sat VDS ©rlc L35-29Apr2011

17 Universal drain characteristic
ID VGS=VT+3V 9ID1 ohmic saturated, VDS>VGS-VT VGS=VT+2V 4ID1 VGS=VT+1V ID1 VDS ©rlc L35-29Apr2011

18 Characterizing the n-ch MOSFET
VD ID D G S B VT VGS ©rlc L35-29Apr2011

19 Low field ohmic characteristics
©rlc L35-29Apr2011

20 MOSFET Device Structre Fig. 4-1, M&A*
©rlc L35-29Apr2011

21 4-7a (A&M) ©rlc L35-29Apr2011

22 Figure 4-7b (A&M) ©rlc L35-29Apr2011

23 Figure 4-8a (A&M) ©rlc L35-29Apr2011

24 Figure 4-8b (A&M) ©rlc L35-29Apr2011

25 Body effect data Fig 9.9** ©rlc L35-29Apr2011

26 MOSFET equivalent circuit elements
Fig 10.51* ©rlc L35-29Apr2011

27 n-channel enh. circuit model
G RG Cgd RDS Cgs S RD D Cbd RB Cbs Idrain Cgb DSS DSD RB B ©rlc L35-29Apr2011

28 MOS small-signal equivalent circuit
Fig 10.52* ©rlc L35-29Apr2011

29 MOSFET circuit parameters
©rlc L35-29Apr2011

30 MOSFET circuit parameters (cont)
©rlc L35-29Apr2011

31 Substrate bias effect on VT (body-effect)
©rlc L35-29Apr2011

32 Body effect data Fig 9.9** ©rlc L35-29Apr2011

33 Fully biased n- channel VT calc
©rlc L35-29Apr2011

34 Values for fms with silicon gate
©rlc L35-29Apr2011

35 Q’d,max and xd,max for biased MOS capacitor
Fig 8.11** |Q’d,max|/q (cm-2) xd,max (microns) ©rlc L35-29Apr2011

36 I-V relation for n-MOS ohmic ID non-physical ID,sat saturated VDS,sat
©rlc L35-29Apr2011

37 MOS channel- length modulation
Fig 11.5* ©rlc L35-29Apr2011

38 Analysis of channel length modulation
©rlc L35-29Apr2011

39 References CARM = Circuit Analysis Reference Manual, MicroSim Corporation, Irvine, CA, 1995. M&A = Semiconductor Device Modeling with SPICE, 2nd ed., by Paolo Antognetti and Giuseppe Massobrio, McGraw-Hill, New York, 1993. **M&K = Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986. *Semiconductor Physics and Devices, by Donald A. Neamen, Irwin, Chicago, 1997 ©rlc L35-29Apr2011


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