1. Semiconductor Device Modeling & Characterization Lecture 23
Professor Ronald L. Carter
Spring 2001
L23 April 10

2. MOSFET equivalent circuit elements
Fig 10.51*
L23 April 10

3. MOS small-signal equivalent circuit
Fig 10.52*
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4. MOS channel- length modulation
Fig 11.5*
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5. Analysis of channel length modulation
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6. Channel length mod- ulated drain char
Fig 11.6*
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7. Fully biased n- channel VT calc
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8. Q’d,max and xd,max for biased MOS capacitor
Fig 8.11**
|Q’d,max|/q (cm-2)
xd,max (microns)
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9. L23 April 10

10. L23 April 10

11. L23 April 10

12. Values for fms with silicon gate
L23 April 10

13. I-V relation for n-MOS ohmic ID non-physical ID,sat saturated VDS,sat
L23 April 10

14. Analysis of channel length modulation
L23 April 10

15. Associating the output conductanceID
ID,sat
VDS,sat
VDS
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16. n-channel enhancement MOSFET in ohmic region
0< VT< VG
e- channel ele + implant ion
Channel
VS = 0
0< VD< VDS,sat
EOx,x> 0 n+
e-e- e- e- e- n+
Depl Reg
p-substrate
Acceptors
VB < 0
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17. Ion implantation
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18. “Dotted box” approx
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19. L23 April 10

20. Mobilities
L23 April 10

21. Fully biased n- channel VT calc
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22. Subthreshold conduction
Below O.S.I., when the total band-bending < 2|fp|, the weakly inverted channel conducts by diffusion like a BJT.
Since VGS>VDS, and below OSI, then Na>nS >nD, and electr diffuse S --> D
Electron concentration at Source
Concentration gradient
driving diffusion
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23. Subthreshold current data
Figure 10.1**
Figure 11.4*
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24. Mobility variation due to Edepl
Figures 11.7,8,9*
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25. Velocity saturation effects
Figure 11.10*
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26. References
*Semiconductor Physics and Devices, by Donald A. Neamen, Irwin, Chicago, 1997.
**Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986
L23 April 10