1. PROCESSORS & CONTROLLERS
Course code : 15 EM 2202
L – T – P : 2 – 2 – 2
Pre Requisite : 15 EC 1101
Credits : 4

2. PROCESSORS AND CONTROLLERS
8086 Microprocessor: Introduction to Microprocessor, Intel Microprocessor families ,8086 Microprocessor architecture, Register Organization, Pin Description, Physical Memory Organization, Modes of operation Instruction set & Assembly Language programming: Addressing modes, Instruction set, Assembler directives, simple Programs, Procedures and Macros, 8086 Interrupts.

3. PROCESSORS AND CONTROLLERS
8051 Microcontroller: Microcontroller families, 8051 Architecture, Signal Description, Register organization, Internal RAM, Special Function Registers, Interrupt control flow, Timer/Counter Operation, Serial Data Communication, and RS-232C Standard.8051 Programming & Interfacing: Addressing modes, Instruction set, Simple Programs involving Arithmetic and Logical Instructions, Timers/Counters, Serial Communication & Interrupts.

4. PROCESSORS AND CONTROLLERS
PIC Microcontroller: Introduction, Architectural overview, Memory organization, interrupts and reset, I/O ports, Timers. Interfacing: Matrix Key Board, Stepper Motor, LCD’s, DAC & ADC. using 8051 and PIC Microcontroller.

5. Microcontroller
8051

6. Microprocessor(µP) & Microcontroller(µC)
Microprocessor is an integrated circuit that contains all the functions of a central processing unit of a computer.
Microcontroller is a control device which incorporates a microprocessor.
A system designer has to add them externally to make them functional. Application of Microprocessor includes Desktop PC's, Laptops, notepads etc.
Microcontroller has a CPU, in addition with a fixed amount of RAM, ROM and other peripherals all embedded on a single chip.

7. General-Purpose Microprocessor System
Microprocessor(µP)
General-purpose microprocessor
CPU for Computers
No RAM, ROM, I/O on CPU chip itself
Example：Intel’s x86, Motorola’s 680x0
Many chips on mother’s board
Data Bus
CPU
General-Purpose Micro-processor
Serial
COM
Port
I/O Port
Intel’s x86: 8086,8088,80386,80486, Pentium
Motorola’s 680x0: 68000, 68010, 68020,68030,6040
RAM
ROM
Timer
Address Bus
General-Purpose Microprocessor System

8. Microcontroller(µC) A single chip A smaller computer
On-chip RAM, ROM, I/O ports...
Example：Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC 16X
CPU
RAM
ROM
A single chip
Serial COM Port
I/O Port
Timer
Microcontroller

9. Differences between µP & µC
S.No.
Microprocessor
Microcontroller 1
Microprocessor is heart of Computer system.
Micro Controller is a heart of embedded system. 2
It is just a processor. Memory and I/O components have to be connected externally
Micro controller has external processor along with internal memory and I/O components 3
Since memory and I/O has to be connected externally, the circuit becomes large.
Since memory and I/O are present internally, the circuit is small. 4
Cannot be used in compact systems and hence inefficient
Can be used in compact systems and hence it is an efficient technique

10. Differences between µP & µC
S.No.
Microprocessor
Microcontroller 5
Cost of the entire system increases
Cost of the entire system is low 6
Since memory and I/O components are all external, each instruction will need external operation, hence it is relatively slower.
Since components are internal, most of the operations are internal instruction, hence speed is fast. 7
Most of the microprocessors do not have power saving features.
Most of the micro controllers have power saving modes like idle mode and power saving mode. This helps to reduce power consumption even further.

11. Differences between µP & µC
S.No.
Microprocessor
Microcontroller 8
Microprocessor have less number of registers, hence more operations are memory based.
Micro controller have more number of registers, hence the programs are easier to write. 9
Microprocessors are based on von Neumann model/architecture where program and data are stored in same memory module
Micro controllers are based on Harvard architecture where program memory and Data memory are separate 10
Mainly used in personal computers
Used mainly in washing machine, MP3 players

12. Comparison of the 8051 Family Members
Feature
8051
8052
8031
ROM (Code memory)
4 kB
8 kB -
RAM (Data memory)
128
256
Timers 2 3
I/O Pins 32
Serial port 1
Interrupt 6 8
versatility 多用途的: any number of applications for PC

13. Block Diagram of 8051 External interrupts On-chip ROM for program code
Timer/Counter
Interrupt Control
On-chip RAM
Timer 1
Counter Inputs
Timer 0
CPU
Serial Port
Bus Control
4 I/O Ports
OSC
P0 P1 P2 P3
TxD RxD
Address/Data

14. Internal Architectural view of 8051

15. Pin Description of the 8051 8051 (8031) 1 2 3 4 5 6 7 8 9 10 11 12 1314 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(T0)P3.4
(T1)P3.5
XTAL2
XTAL1
GND
(INT0)P3.2
(INT1)P3.3
(RD)P3.7
(WR)P3.6
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
EA/VPP
ALE/PROG
PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
8051
(8031)

16. Pin Description of the 8051 Vcc（pin 40）：
Vcc provides supply voltage to the chip.
The voltage source is +5V.
GND（pin 20）：ground
XTAL1 and XTAL2（pins 19,18）

17. Pin Description of the 8051 Using a quartz crystal oscillator
We can observe the frequency on the XTAL2 pin. C2
30pF C1
XTAL2
XTAL1
GND

18. Pin Description of the 8051 RST（pin 9）：reset
It is an input pin and is active high（normally low）.
The high pulse must be high at least 2 machine cycles.
It is a power-on reset.
Upon applying a high pulse to RST, the microcontroller will reset and all values in registers will be lost.
Reset values of some 8051 registers

19. Pin Description of the 8051 Vcc + 10 uF 31 EA/VPP X1 30 pF 19
MHz
8.2 K X2 18
30 pF
RST 9

20. Pin Description of the 8051 /EA（pin 31）：External access
There is no on-chip ROM in 8031 and
The /EA pin is connected to GND to indicate the code is stored externally.
/PSEN ＆ ALE are used for external ROM.
For 8051, /EA pin is connected to Vcc.
“/” means active low.
/PSEN（pin 29）：program store enable
This is an output pin and is connected to the OE pin of the ROM.

21. Pin Description of the 8051 ALE（pin 30）：address latch enable
It is an output pin and is active high.
8051 port 0 provides both address and data.
The ALE pin is used for de-multiplexing the address and data by connecting to the G pin of the 74LS373 latch.
I/O port pins
The four ports P0, P1, P2, and P3.
Each port uses 8 pins.
All I/O pins are bi-directional.

22. Pin Description of the 8051 The 8051 has four I/O ports
Port 0 （pins 32-39）：P0（P0.0～P0.7）
Port 1（pins 1-8） ：P1（P1.0～P1.7）
Port 2（pins 21-28）：P2（P2.0～P2.7）
Port 3（pins 10-17）：P3（P3.0～P3.7）
Each port has 8 pins.
Ex：P0.0 is the bit 0 (LSB) of P0
Ex：P0.7 is the bit 7 (MSB)of P0
These 8 bits form a byte.
Each port can be used as input or output (bi-direction).
Program is to read data from P0 and then send data to P1

23. Pin Description of the 8051 Each pin of I/O ports
Internal CPU bus：communicate with CPU
A D latch store the value of this pin
D latch is controlled by “Write to latch”
Write to latch＝1：write data into the D latch
2 Tri-state buffer.
TB1: controlled by “Read pin”
Read pin＝1：read the data present at the pin
TB2: controlled by “Read latch”
Read latch＝1：read value from internal latch
A transistor M1 gate
Gate=0: open
Gate=1: close

24. Port 0 with Pull-Up Resistors
DS5000
8751
8951
Vcc
10 K
Port 0

25. Port 3 Alternate Functions17 RD
P3.7 16 WR
P3.6 15 T1
P3.5 14 T0
P3.4 13
INT1
P3.3 12
INT0
P3.2 11
TxD
P3.1 10
RxD
P3.0
Pin
Function
P3 Bit

26. RESET Value of Some 8051 RegistersPC
0000
ACC 00 B 00
PSW 00 SP 07
DPTR
0000
RAM are all zero.

27. Memory mapping in 8051 ROM memory map in 8051 family 4k 8k 32k 0000H
0FFFH
1FFFH
7FFFH
8751
AT89C51
8752
AT89C52 4k 8k
32k DS
from Atmel Corporation
from Dallas Semiconductor

28. Some 8-bit Registers of the 8051A B R0 R1 R3 R4 R2 R5 R7 R6
DPH
DPL PC
DPTR
Some bit Register
Some 8-bit Registers of the 8051

29. RAM memory space allocation in the 8051
7FH
30H
2FH
20H
1FH
17H
10H
0FH
07H
08H
18H
00H
Register Bank 0
(Stack) Register Bank 1
Register Bank 2
Register Bank 3
Bit-Addressable RAM
Scratch pad RAM

30. Bit-Addressable RAM

34. 8051 Flag bits and the PSW registerCY AC F0
RS1 OV
RS0 P --
CY PSW.7 Carry flag
AC PSW.6 Auxiliary carry flag
-- PSW.5 Available to the user for general purpose
RS1 PSW.4 Register Bank selector bit 1
RS0 PSW.3 Register Bank selector bit 0
OV PSW.2 Overflow flag
-- PSW.1 User define bit
P PSW.0 Parity flag Set/Reset odd/even parity
RS1 RS0 Register Bank Address
H-07H
H-0FH
H-17H
H-1FH

35. Stack in the 8051
The register used to access the stack is called SP (stack pointer) register. The stack pointer in the 8051 is only 8 bits wide, which means that it can take value 00 to FFH. When 8051 powered up, the SP register contains value 07.
7FH
30H
2FH
20H
1FH
17H
10H
0FH
07H
08H
18H
00H
Register Bank 0
(Stack) Register Bank 1
Register Bank 2
Register Bank 3
Bit-Addressable RAM
Scratch pad RAM

36. Start SP=07H 25 SP=08H 12 25 SP=09H F3 12 25 SP=0AH
0BH
0AH
09H
08H
Start SP=07H 25
0BH
0AH
09H
08H
SP=08H 12 25
0BH
0AH
09H
08H
SP=09H F3 12 25
0BH
0AH
09H
08H
SP=0AH
Example of STACK operation: MOV R6,#25H MOV R1,#12H MOV R4,#0F3H PUSH 6 PUSH 1 PUSH 4

37. Immediate Register Direct Register Indirect Indexed
Addressing Modes
Immediate Register Direct Register Indirect Indexed

38. Immediate Addressing Mode. MOV. A,#65H. MOV. A,#’A’. MOV. R6,#65H. MOV
Immediate Addressing Mode MOV A,#65H MOV A,#’A’ MOV R6,#65H MOV DPTR,#2343H MOV P1,#65H

39. Register Addressing Mode MOV. Rn, A. ;n=0,. ,7 ADD. A, Rn MOV
Register Addressing Mode MOV Rn, A ;n=0,..,7 ADD A, Rn MOV DPL, R6 MOV DPTR, A MOV Rm, Rn

40. Direct Addressing Mode
Direct Addressing Mode Although the entire of 128 bytes of RAM can be accessed using direct addressing mode, it is most often used to access RAM loc. 30 – 7FH. MOV R0, 40H MOV 56H, A MOV A, 4 ; ≡ MOV A, R4 MOV 6, 2 ; copy R2 to R6 ; MOV R6,R2 is invalid ! SFR register and their address MOV 0E0H, #66H ; ≡ MOV A,#66H MOV 0F0H, R2 ; ≡ MOV B, R2 MOV 80H,A ; ≡ MOV P1,A

41. Register Indirect Addressing Mode In this mode, register is used as a pointer to the data. MOV ; move content of RAM loc. Where address is held by Ri into A ( i=0 or 1 ) MOV @R1,B In other word, the content of register R0 or R1 is sources or target in MOV, ADD and SUBB instructions. Example: Write a program to copy a block of 10 bytes from RAM location starting at 40H to RAM location starting at 60H. Solution: MOV R0,#40H ; source pointer MOV R1,#60H ; destination pointer MOV R2,#10 ; counter BACK: MOV MOV @R1,A INC R0 INC R1 DJNZ R2,BACK

42. Indexed Addressing Mode And On-Chip ROM Access This mode is widely used in accessing data elements of look-up table entries located in the program (code) space ROM at the MOVC A= content of address A +DPTR from ROM Note: Because the data elements are stored in the program (code ) space ROM of the 8051, it uses the instruction MOVC instead of MOV. The “C” means code.

43. SJMP and LJMP: LJMP(long jump). LJMP is an unconditional jump
SJMP and LJMP: LJMP(long jump) LJMP is an unconditional jump. It is a 3-byte instruction in which the first byte is the op-code, and the second and third bytes represent the 16-bit address of the target location. The 20byte target address allows a jump to any memory location from 0000 to FFFFH. SJMP(short jump) In this 2-byte instruction. The first byte is the op-code and the second byte is the relative address of the target location. The relative address range of 00-FFH is divided into forward and backward jumps, that is , within -128 to +127 bytes of memory relative to the address of the current PC.

44. MUL & DIV MUL AB ;B|A = A*B MOV A,#25H MOV B,#65H MUL AB ;25H*65H=0E ;B=0EH, A=99H DIV AB ;A = A/B, B = A mod B MOV A,#25H MOV B,#10H DIV AB ;A=2, B=5

45. Rotate EXAMPLE: RR: RRC: RL: RLC:

46. 8051 INSTRUCTION SET ACALL: Absolute Call
ADD, ADDC: Add Acc. (With Carry)
AJMP: Absolute Jump
ANL: Bitwise AND
CJNE: Compare & Jump if Not Equal
CLR: Clear Register
CPL: Complement Register
DA: Decimal Adjust
DEC: Decrement Register
DIV: Divide Accumulator by B
DJNZ: Dec. Reg. & Jump if Not Zero
INC: Increment Register
JB: Jump if Bit Set
JBC: Jump if Bit Set and Clear Bit
JC: Jump if Carry Set
JMP: Jump to Address
JNB: Jump if Bit Not Set
JNC: Jump if Carry Not Set
JNZ: Jump if Acc. Not Zero
JZ: Jump if Accumulator Zero
LCALL: Long Call
LJMP: Long Jump
MOV: Move Memory
MOVC: Move Code Memory
MOVX: Move Extended Memory
MUL: Multiply Accumulator by B
NOP: No Operation
ORL: Bitwise OR
POP: Pop Value From Stack
PUSH: Push Value Onto Stack
RET: Return From Subroutine
RETI: Return From Interrupt
RL: Rotate Accumulator Left
RLC: Rotate Acc. Left Through Carry
RR: Rotate Accumulator Right
RRC: Rotate Acc. Right Through Carry
SETB: Set Bit
SJMP: Short Jump
SUBB: Sub. From Acc. With Borrow
SWAP: Swap Accumulator Nibbles
XCH: Exchange Bytes
XCHD: Exchange Digits
XRL: Bitwise Exclusive OR
Undefined: Undefined Instruction
8051 INSTRUCTION SET

47. Arithmetic instructions:
ADD A,Rn
ADD A,Direct
ADD
ADD A,#Data
ADDC A,Rn
SUBB A, Direct
SUBB
SUBB A,#Data
INC A
INC Rn
INC Direct
DEC A
DEC Rn
Arithmetic instructions:
ADDC A, Direct
ADDC
ADDC A,#Data
SUBB A,Rn

48. Arithmetic instructions:
DEC Direct
INC DPTR
MUL AB
DIV AB
DA A
Arithmetic instructions:

49. Logical instructions:
ANL A,Rn
ANL A,Direct
ANL
ANL A,#Data
ANL Direct,A
ANL Direct,#Data
ORL A,Rn
ORL A,Direct
ORL
ORL A,#Data
ORL Direct,A
ORL Direct,#Data
XRL A,Rn
XRL A,Direct
XRL
XRL A,#Data
XRL Direct,A
XRL Direct,#Data
Logical instructions:

50. Logical instructions:
CLR A
CPL A
RL A
RLC A
RR A
RRC A
SWAP A
Logical instructions:

51. Data transfer instructions:
MOV A,Rn
MOV A, Direct
MOV
MOV A,#Data
MOV Rn,A
MOV Rn,Direct
MOV Rn,#Data
MOV Direct,A
MOV Direct, Rn
MOV Direct, Direct
MOV
MOV Direct,#Data
MOV DPTR,#Data16
MOVX
MOVX
Data transfer instructions:

52. Data transfer instructions:
PUSH Direct
POP Direct
XCH A,Rn
XCH A, Direct
XCH
XCHD
Data transfer instructions:

53. Boolean Variable Manipulation instructions:
CLR C
CLR bit
SETB C
SETB bit
CPL C
CPL bit
ANL C,bit
ANL C,/bit
ORL C,bit
ORL C,/bit
MOV C,bit
MOV bit,C
JC rel
JNC rel
JB bit,rel
JNB bit,rel
JBC bit,rel
Boolean Variable Manipulation instructions:

54. Program branching instructions:
ACALL addr11
LCALL addr16
RET
RETI
AJMP addr11
LJMP addr16
SJMP rel
JZ rel
JNZ rel
CJNE A,direct,rel
CJNE A,#data,rel
CJNE Rn,#data,rel
DJNZ Rn,rel
DJNZ direct,rel
NOP
Program branching instructions:

55. END