1. A fixed-function NVIDIA GeForce graphics pipeline.
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FIGURE 2.1
A fixed-function NVIDIA GeForce graphics pipeline.
“Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

2. KIRK
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FIGURE 2.2
Texture mapping example: painting a world map texture image onto a globe object.
“Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

3. Example of antialiasing operations.
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FIGURE 2.3
Example of antialiasing operations.
“Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

4. KIRK
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FIGURE 2.4
Example of a separate vertex processor and fragment processor in a programmable graphics pipeline.
“Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

5. KIRK
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FIGURE 2.5
Unified programmable processor array of the GeForce 8800 GTX graphics pipeline.
“Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

6. KIRK
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FIGURE 2.6
The restricted input and output capabilities of a shader programming model.
“Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”