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Arithmetic and Logic Chapter 3

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Presentation on theme: "Arithmetic and Logic Chapter 3"— Presentation transcript:

1 Arithmetic and Logic Chapter 3
Sepehr Naimi Sarmad Naimi

2 Objectives Add, subtract, multiply, and divide Carry
Logic instructions Shift and Rotate BCD, Packed BCD and ASCII conversion.

3 S Suffix in Arm Instructions
Instruction (Flags unchanged) Instruction (Flags updated) ADD Add ADDS Add and set flags ADC Add with carry ADCS Add with carry and set flags SUB SUBS Subtract and set flags SBC Subtract with carry SBCS Subtract with carry and set flags MUL Multiply MULS Multiply and set flags UMULL Multiply long UMULLS Multiply Long and set flags RSB Reverse subtract RSBS Reverse subtract and set flags RSC Reverse subtract with carry RSCS Reverse subtract with carry and set flags Note: The above instruction affect all the N, Z, C, and V flag bits of CPSR (current program status register)

4 ADD ldr r2, =0xfffffff5 @ r2 = 0xfffffff5 (notice the = sign)
mov r3, #0x0b adds r1, r2, r3 @ r1 = r2 + r3 and update the flags 0xFFFFFFF5 + 0x B 0x C=1 Z=1 All zeros

5 Adding 64-bit using ADC (Add with Carry)
ldr r0, r0 = 0xf62562fa ldr r1, r1 = 0xf412963b mov r2, #0x35 @ r2 = 0x35 mov r3, #0x21 @ r3 = 0x21 adds r5, r1, r0 @ r5 = 0xf62562fa + 0xf412963b @ now c = 1 adc r6, r2, r3 @ r6 = r2 + r3 + c @ = 0x = 0x57 F FA + F B C=1 1 EA 37 F9 35

6 Some ideas about subtraction
100 – 34 = ? 99 – 34 = ? 100 – 34 = (99-34) + 1 34 – 19 = ? – 100 = 34 + (99-19)

7 Some ideas about subtraction (Cont.)
– = ? = – = A  – = A – = A – =

8 SUB mov r2, #0x4f @ r2 = 0x4f subs r4, r2, #0x05 @ r4 = r2 – 0x05
0x4A FFFFFFFB 2’s complement + 1 A C=1 (no barrow)

9 Using SUBC (SUB with Carry)
ldr r0, r0 = 0xf62562fa ldr r1, r1 = 0xf412963b mov r2, r2 = 0x21 mov r3, r3 = 0x35 subs r5, r1, r0 @ r5 = r1 – r0 @ = 0xf412963b – 0xf62562fa @ = 0xFDED3341, and c = 0 sbc r6, r3, r2 @ r6 = r3 – r2 – 1 + c @ = 0x35 – 0x21 – = 0x13 F B F B 2’s complement F FA + 09 DA 9D 06 FD ED 33 41 C=0 FD ED 33 41

10 Multiplication MUL Rd, Rn, Op2 @ Rd = Rn × Op2 Example:
MOV R1, R1=0x25 MOV R2, R2=0x65 MUL R3, R1, R3 = R1 × R2 = 0x65 × 0x25 UMULL RdLo, RdHi, Rn, RdHi:RdLo = Rn × Op2 LDR R1, R1 = 0x LDR R2, R2 = 0x UMULL R3, R4, R2, 0x × 0x = 0x A @ R3 = 0xA , the lower 32 bits @ R4 = 0x , the higher 32 bits MLA Rd, Rm, Rs, Rn @ Rd = Rm × Rs + Rn MOV R1, #100 @ R1 = 100 MOV R2, #5 @ R2 = 5 MOV R3, #40 @ R3 = 40 MLA R4, R1, R2, R4 = R1 × R2 + R3 = 100 × = 540

11 Division UDIV Rd, Rn, Op2 @ Rd = Rn / Op2 Example: mov r1, #8 @ r1 = 8
udiv r5, r1, r5 = 8 / 3 = 2

12 Logic Instructions AND Rd,Rn,Op2 @ Rd = Rn AND Op2
ORR Rd = Rn OR Op2 EOR Rd = Rn XOR Op2 MVN Rd,Op2 @ Rd = 1’s Complement of Op2 ( – Rd) AND can be used to clear a specific bit(s) of a byte OR can be used to set a specific bit(s) of a byte Show the results of the following. MOV R2,#0x35 ;R2 = 0x35 ANDS R3,R2,#0x0F ;R3 = R2 AND 0x0F (now R2 = 0x05) Solution: AND 0F ;35 AND 0F = 05, Z = 0

13 Setting and Clearing bits
AND can be used to clear a specific bit(s) of a byte OR can be used to set a specific bit(s) of a byte AND 0F OR

14 Rotate and Shift Instructions

15 LSL instruction MOVS Rd, Rn, LSL #numOfShift
LSL(S) Rd, Rn, #numOfShift ;Logical Shift Left In LSL, as bits are shifted from right to left, 0 enters the LSB and the MSB exits to the carry flag. In other words, in LSL 0 is moved to the LSB, and the MSB is moved to the C. this instruction multiplies content of the register by 2 if after LSL the carry flag is not set. In the next code you can see what happens to after running 3 LSL instructions. ;Assume C = 0 MOV R2 , #0x26 ;R2 = (38) C = 0 LSLS R2,R2,#1 ;R2 = (74) C = 0 LSLS R2,R2,#1 ;R2 = (148) C = 0 LSLS R2,R2,#1 ;R2 = (296) C = 0

16 LSR instruction In LSR, as bits are shifted from left to
LSR(S) Rd, Rn, #numOfShift ;Logical Shift Right MOVS Rd, Rn, LSR #numOfShift In LSR, as bits are shifted from left to right, 0 enters the MSB and the LSB exits to the carry flag. In other words, in LSR 0 is moved to the MSB, and the LSB is moved to the C. this instruction divides content of the register by 2 and carry flag contains the remainder of division. In the next code you can see what happens to after running 3 LSR instructions. MOV R2, #0x26 ;R2 = (38) LSRS R2, R2, #1 ;R2 = (19) C = 0 LSRS R2, R2, #1 ;R2 = (9) C = 1 LSRS R2, R2, #1 ;R2 = (4) C = 1

17 ROR instruction (Rotate Right)
ROR Rd, Rm, #numOfShifts ;Rotate Rm right Rn bit positions MOVS Rd, Rm, ROR #numOfShifts In ROR, as bits are rotated from left to right, the LSB goes to the MSB and to the carry flag. See what happens to after running 3 ROR instructions: ;assume C = 0 (carry is 0 ) MOV R2, #0x26 ;R2 = RORS R2, R2, #1 ;R2 = C = 0 RORS R2, R2, #1 ;R2 = C = 1 RORS R2, R2, #1 ;R2 = C = 1

18 RRX instruction (Rotate Right with extend)
RRX(S) Rd, Rm ;Rotate Rm right 1 bit through C flag MOVS Rd, Rm, RRX In RRXS, as bits are rotated from left to right, the carry flag enters the MSB and the LSB exits to the carry flag. In other words, in RRXS the C is moved to the MSB, and the LSB is moved to the C. See what happens to after running 3 ROR instructions: ;assume C = 0 (carry is 0 ) MOV R2, #0x26 ;R2 = RRXS R2, R2 ;R2 = C = 0 RRXS R2, R2 ;R2 = C = 1 RRXS R2, R2 ;R2 = C = 1

19 BCD, Packed BCD and ASCII conversion.
ASCII Codes BCD BCD Codes Packed BCD BCD1 BCD0 ASCII and BCD Codes for Digits 0–9

20 Packed BCD to ASCII conversion
To convert packed BCD to ASCII: you must first convert it to unpacked BCD. Then the unpacked BCD is tagged with (30H). Packed BCD = Unpacked BCD = , ACSII = ,


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