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University of Amsterdam Computer Systems – the instruction set architecture Arnoud Visser 1 Computer Systems The instruction set architecture.

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Presentation on theme: "University of Amsterdam Computer Systems – the instruction set architecture Arnoud Visser 1 Computer Systems The instruction set architecture."— Presentation transcript:

1 University of Amsterdam Computer Systems – the instruction set architecture Arnoud Visser 1 Computer Systems The instruction set architecture

2 University of Amsterdam Computer Systems – the instruction set architecture Arnoud Visser 2 Intel Processors A stable platform for nearly 20 years –8086 (1978) 8 bits –80186 (1980) 8 or 16 bits –80286 (1982) 16 bits –80386 (1985) 32 bits (33 MHz) –Pentium 4 (2001) 32 bits (3.2 GHz)

3 University of Amsterdam Computer Systems – the instruction set architecture Arnoud Visser 3 Intel Architecture 32-bit Each processor was designed to be backward compatible Co-processor is been integrated Extra instructions are added for vector manipulation (MMX, SSE) Gcc didn’t use these instructions until version 3.1 (May 2002)

4 University of Amsterdam Computer Systems – the instruction set architecture Arnoud Visser 4 ALU is still the core Unit that performs arithmetic / logic operations on two inputs ALUALU Y X X + Y 0 ALUALU Y X X - Y 1 ALUALU Y X X & Y 2 ALUALU Y X X ^ Y 3 A B A B A B A B

5 University of Amsterdam Computer Systems – the instruction set architecture Arnoud Visser 5 Basic Knowledge Introduced in ‘Digitale Techniek’

6 University of Amsterdam Computer Systems – the instruction set architecture Arnoud Visser 6 Timing For an subtraction, you needed three steps (automated with an sequencer)

7 University of Amsterdam Computer Systems – the instruction set architecture Arnoud Visser 7 Micro-instructions The ‘invoer’ is moved from memory to two registers (a,d), followed by operation subl int subtract(int invoer1, int invoer2) { return (invoer1 - invoer2); } _subtract: pushl%ebp movl%esp, %ebp movl12(%ebp), %edx movl8(%ebp), %eax subl%edx, %eax popl%ebp ret Register file ALU Gcc -S

8 University of Amsterdam Computer Systems – the instruction set architecture Arnoud Visser 8 Integer Arithmetic Operations Of the 15 operations, we concentrate on 4 (Y86) InstructionEffectDescription addl S,DD ← D + SAdd subl S,DD ← D - SSubtract andl S,DD ← D & SAnd xorl S,DD ← D ^ SExclusive-or Incl DD ← D + 1Increment Sarl k, DD ← D >> kArithmetic right shift

9 University of Amsterdam Computer Systems – the instruction set architecture Arnoud Visser 9 Conclusion We understand know how the simplest of subroutines is translated in micro- instructions int subtract(int invoer1, int invoer2) { return (invoer1 - invoer2); } _subtract: pushl%ebp movl%esp, %ebp movl12(%ebp), %edx movl8(%ebp), %eax subl%edx, %eax popl%ebp ret Gcc -S


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