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RF Electronics Engineering
Spring 2014 RF Systems and Circuits RF Electronics Engineering Emad Hegazi Professor, ECE Communication Circuits Research Group
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Spring 2014 RF Systems and Circuits Resonance Resonance represents the intrinsic rate of energy exchange in a second order system. Friction forces oscillation to cease after a while. Less friction means higher quality system
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Circuit Analysis RF Systems and Circuits Why? If there is no loss
Spring 2014 RF Systems and Circuits Circuit Analysis If there is no loss Why? define
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Spring 2014 RF Systems and Circuits Resonance Inductor and Capacitor exchange energy and loss resistance keeps burning energy By the way, the parallel resistance is simply a model.
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Susceptance @ Resonance
Spring 2014 RF Systems and Circuits Resonance R is the ONLY block that draws current from the source at resonance The tank looks like a high impedance to the supply.
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Quality The ratio of stored current to the source current at resonance
Spring 2014 RF Systems and Circuits Quality The ratio of stored current to the source current at resonance R must be large for higher Q.
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Spring 2014 RF Systems and Circuits Series Resonance
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Getting Real RF Systems and Circuits If the input source is constant
Spring 2014 RF Systems and Circuits Getting Real If the input source is constant
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Spring 2014 RF Systems and Circuits Resonance Inductor and Capacitor exchange energy and loss resistance keeps burning energy The impedance is at minimum when at resonance
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Spring 2014 RF Systems and Circuits Resonance Q is the ratio between the voltage on the reactance to the source voltage.
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Passive Amplification
Spring 2014 RF Systems and Circuits Passive Amplification QVm -QVm Maximum current flows in the circuit means L & C see maximum voltage at opposite polarities. @ resonance, the circuit amplifies the source voltage by Q
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Spring 2014 RF Systems and Circuits Impedance Conversion
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Spring 2014 RF Systems and Circuits Impedance Conversion
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Outline Friis Formula Merits of LNAs Common Gate LNA Common Source LNA
Spring 2014 RF Systems and Circuits Outline Friis Formula Merits of LNAs Common Gate LNA Common Source LNA
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Spring 2014 RF Systems and Circuits Cascaded Noise Figure In a line-up of receiver stages, use Friis equation Gi is the power gain Says that the noise factor ‘F’ is more influenced by earlier stages
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LNA Merits Gain Low Noise (NF) High Linearity (IIP3)
Spring 2014 RF Systems and Circuits LNA Merits Gain Low Noise (NF) High Linearity (IIP3) Low Reflection (S11) High reverse isolation (S12) High Stability (K)
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Maximum Power Transfer
Spring 2014 RF Systems and Circuits Maximum Power Transfer
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Transistor Noise Thermal noise is referred to the input
Spring 2014 RF Systems and Circuits Transistor Noise Thermal noise is referred to the input Physical Circuit equivalent
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Common Gate LNA Input impedance is resistive (except for parasitics)
Spring 2014 RF Systems and Circuits Common Gate LNA Input impedance is resistive (except for parasitics) Offers good impedance match even at low frequencies
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Spring 2014 RF Systems and Circuits Common Gate LNA tunes out transistor and board parasitics. Channel resistance offers good reverse isolation
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Common Gate LNA At matching condition, Zin = 1/gm
Spring 2014 RF Systems and Circuits Common Gate LNA At matching condition, Zin = 1/gm
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Impedance Transformers
Spring 2014 RF Systems and Circuits Impedance Transformers
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Impedance Matching Maximum power transfer Minimum noise figure
Spring 2014 RF Systems and Circuits Impedance Matching Maximum power transfer Minimum noise figure Optimized passives’ transfer functions Minimum reflections
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Impedance Matching Impedance mismatch is preserved at each port
Spring 2014 RF Systems and Circuits Impedance Matching Impedance mismatch is preserved at each port We need a TRANSFORMER
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Transformer Matching Transformers are bulky and lossy
Spring 2014 RF Systems and Circuits Transformer Matching Transformers are bulky and lossy We don’t really need wideband matching in RF transceivers Think of a narrow band equivalent of a transformer
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Narrow Band Impedance Transformers
Spring 2014 RF Systems and Circuits Narrow Band Impedance Transformers Load resistance takes only a fraction of the input current Looks like a higher resistance than it really is. Problem: Zin looks reactive
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L-Match @resonance the C and Ls tune out and only Rs remains.
Spring 2014 RF Systems and Circuits L-Match @resonance the C and Ls tune out and only Rs remains. LNA input is made with higher R to save power LNA Antenna
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Common Gate LNA: Lowering Power II
Spring 2014 RF Systems and Circuits Common Gate LNA: Lowering Power II Narrowband impedance transformer (L Section) allows the LNA to have Zin>50W. Transformer amplifies input signal by:
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Common Gate LNA: Lowering Power II
Spring 2014 RF Systems and Circuits Common Gate LNA: Lowering Power II For same IIP3, Veff has to increase by >1 Current is reduced by the same factor Bias current is given by: gm
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Common Gate LNA: Lowering Power III
Spring 2014 RF Systems and Circuits Common Gate LNA: Lowering Power III gm
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Common Source Amplifier
Spring 2014 RF Systems and Circuits Common Source Amplifier Input impedance is purely capacitive Resistive part appears at high frequency No input matching is possible
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Common Source Amplifier
Spring 2014 RF Systems and Circuits Common Source Amplifier Rg is set to 50W => Input Matching Miller Effect due to Cgd => Limited Bandwidth
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Common Source Amplifier
Spring 2014 RF Systems and Circuits Common Source Amplifier Cascode reduces Miller Effect Resistive Load limits linearity
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Common Source Amplifier
Spring 2014 RF Systems and Circuits Common Source Amplifier Parallel Resonance at output boasts narrow band gain without impacting linearity Rg produces a lot of Noise NF>3 dB
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Common Source Amplifier
Spring 2014 RF Systems and Circuits Common Source Amplifier Series resonance at input creates a resistive term Iin= jw CgsVgs Vin=Vgs+jwLs(Iin+gmVgs) gmVgs Iin
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Common Source Amplifier
Spring 2014 RF Systems and Circuits Common Source Amplifier Series resonance at input creates a resistive term @ RF, input is still capacitive because Ls is very small to give 50W with high wT
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Common Source Amplifier
Spring 2014 RF Systems and Circuits Common Source Amplifier Gate inductance offers one more degree of freedom to allow matching and series resonance at the same time Valid for
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Spring 2014 RF Systems and Circuits Parasitics Ali Niknejad ECE142
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Design Procedure for Common Source LNAs
Spring 2014 RF Systems and Circuits Design Procedure for Common Source LNAs
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Common Source Amplifier
Spring 2014 RF Systems and Circuits Common Source Amplifier Assume an equivalent resistive load Rd @ resonance
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Common Source Amplifier
Spring 2014 RF Systems and Circuits Common Source Amplifier Noise Figure (F) is given by Source Coils Transistor Use samll Ls Decreases with wT
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Optimization of CS LNA Assume @ Input matching condition
Spring 2014 RF Systems and Circuits Optimization of CS LNA Assume @ Input matching condition
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Optimization of CS LNA wT Increases Lg Noise dominates Higher power
Spring 2014 RF Systems and Circuits Optimization of CS LNA wT Increases Lg Noise dominates Higher power
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Another Way to Look at It
Spring 2014 RF Systems and Circuits Another Way to Look at It If Q is input quality factor
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Another Way to Look at It
Spring 2014 RF Systems and Circuits Another Way to Look at It The input is amplified by Q before it reaches the transistor This reduces linearity
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Other Losses: Inductor Losses
Spring 2014 RF Systems and Circuits Other Losses: Inductor Losses Typically Lg losses dominate Adds in series to source noise Independent of FET gain
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Other Losses: Gate Resistance
Spring 2014 RF Systems and Circuits Other Losses: Gate Resistance Gate Resistance creates additional noise (uncorrelated with channel noise) Use inter-digitated layout to reduce gate electrode resistance
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Other Losses: Gate Induced Noise
Spring 2014 RF Systems and Circuits Other Losses: Gate Induced Noise Due to inversion layer resistance Partly correlated with conventional thermal noise Modeled as a resistance in series with gate
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Other Losses: Gate Induced Noise
Spring 2014 RF Systems and Circuits Other Losses: Gate Induced Noise The effective Q is lowered by losses Higher Q is achieved through lower Cgs Smaller Cgs raises rinv and also gate resistance There is an optimum W at each current
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Other Losses: Substrate Coupling
Spring 2014 RF Systems and Circuits Other Losses: Substrate Coupling BSIM3V3 models do NOT capture Cgb Gate to bulk capacitance is an additional path for noise
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Other Losses: Substrate Coupling
Spring 2014 RF Systems and Circuits Other Losses: Substrate Coupling Hole distribution in the depletion layer are modulated by gate voltage Same effect on electrons in the inversion layer which reflects back on depletion region
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