1. JKFlip-Flop JK Flip-Flop

2. Lecture Overview J-K Flip Flops Asynchronous Input Sample Flip Flop Applications

3. J-K Flip Flop CLK  Q n+1 Q n (no change) 0 (clear) 1 (set) Q n (toggle) K0101K0101 J0011J0011 J Q K Q

4. Negative Edged Triggers - J-K Flip Flop CLK  Q n+1 Q n (no change) 0 (clear) 1 (set) Q n (toggle) K0101K0101 J0011J0011

5. J-K Flip Flop with Preset & Clear Q n+1 1 (preset) 0 (clear) ? (illegal) Q n 0 1 Q n CLK X  KXXX0101KXXX0101 JXXX0011JXXX0011 CLR 1 0 1 P-SET 0 1 0 1

6. Divide-By Circuit with J-K Flip Flop

7. Divide By Circuit - Simulation