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Published byKiya Letts Modified over 10 years ago
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1 SPEC FPGA FMC-base CARD WR PTP core user core SFP time WHISBONE EtherBone time
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SPEC WR Node Device FPGA FMC-base CARD WR PTP core user core SFP WHISBONE EtherBone time
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WR Node IP Core WR PTP Core external PHY Tx Ethernet Rx EEPROM external oscillators I2CI2C CLK REF CLK DMTD adjust 1-PPS Timecode frequency source sink MAC I/F pipelined WB Slave I/F timing I/F control/status pins
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WR Node IP Core WR PTP Core external PHY Tx Ethernet Rx EEPROM external oscillators I2CI2C CLK REF CLK DMTD adjust 1-PPS Timecode frequency source sink MAC I/F pipelined WB Slave I/F timing I/F control/status pins SPEC WR Node Device FPGA FMC-base CARD WR PTP core user core SFP WHISBONE EtherBone time Example WR Node Design
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SPEC WR Node IP Core WR Node Device FPGA FMC-base CARD WR PTP core WR PTP Core Example WR Node Design external PHY Tx Ethernet Rx EEPROM external oscillators I2CI2C CLK REF CLK DMTD adjust 1-PPS Timecode frequency source sink MAC I/F pipelined WB Slave I/F timing I/F control/status pins user core SFP WHISBONE EtherBone time
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