2. Instrumentation B asic S kills in E lectricity and E lectronics Sixth Edition Lab 3 Introduction to the Logic Probe ©2003 Glencoe/McGraw-Hill Charles A. Schuler

3. Lamp OFF … LOGIC LOWLamp ON … LOGIC HIGHLamp DIM … OPEN CIRCUIT (FLOATING) OR BAD LEVEL (Other brands of probes may differ)

4. 0 10 60 50 80 70 40 30 20 100 90 HIGH LOW Digital logic levels as % of V SUPPLY HIGH TTLCMOS (5 V supply)(3 to 18 V supply) % of V SUPPLY UNDEFINED LOW = 1 = ON = ? = FLOATING = 0 = OFF

5. Common faults that can be detected with logic probes Open bond (floating output) Internal short (stuck high) Solder bridge (stuck low) Defective input

6. Logic probe with pulse memory (often used to catch “glitches”) 1. Set TTL/CMOS switch to family under test. 2. Place tip on circuit under test. 3. Press MEM/CLR (light goes out). 4. Light comes on when a single pulse (“glitch”) occurs.

7. Pulse trains cause the probe to flash at less than a 10 Hz rate even if the pulse frequency is much higher. (up to 80 MHz) This probe will “stretch” pulses as short as 10 ns and the lamp will flash.

8. Logic Probe Quiz When the lamp is off, the logic level isLOW When the lamp is on, the logic level isHIGH When the lamp is dim, the logic level isbad or floating When the lamp is flashing, the logic level isa pulse train A probe with pulse memory is useful when looking for glitches