1. FET Small-Signal Analysis

2. FET Small-Signal Model
Transconductance
The relationship of VGS (input) to ID (output) is called transconductance.
The transconductance is denoted gm.
Transfer Curve

3. Graphical Determination of gm

4. Mathematical Definition of gm
Using differential calculus
Maximum gm at VGS =0V:
Effect of ID on gm for

5. Very large to assume input terminal approximate an open circuit
FET Impedance
Input Impedance Zi:
Very large to assume input terminal approximate an open circuit
Output Impedance Zo:
yos: admittance equivalent circuit parameter listed on FET specification sheets.

6. FET Specification

7. FET AC Equivalent Circuit

8. JFET Fixed-Bias Configuration
The input is on the gate and the output is on the drain.

9. JFET Fixed-Bias Configuration
Once again: same step as BJT to redraw the network to AC equivalent circuit.
Capacitor – short circuit
DC batteries VGG and VDD are set to zero volts by a short-circuit equivalent

10. AC Equivalent Circuit

11. AC Equivalent Circuit

12. Impedances
Input Impedance:
Output Impedance:

13. Voltage Gain

14. Phase Relationship
A CS amplifier configuration has a 180-degree phase shift between input and output.

15. AV ignoring the effects of rd
Example
Fixed-bias configuration has an operating point defined by VGSQ = -2V and IDQ = mA, with IDSS = 10mA and VP = -8V. The value of yos is provided as 40 µS. Determine: gm Zi Zo AV
AV ignoring the effects
of rd

16. Solution

17. JFET CS Self-Bias Configuration
This is a CS amplifier configuration therefore the input is on the gate and the output is on the drain.

18. AC Equivalent Circuit

19. Impedances
Input Impedance:
Output Impedance:

20. Voltage Gain

21. Phase Relationship
A CS amplifier configuration has a 180-degree phase shift between input and output.

22. JFET CS Self-Bias Configuration – Unbypassed Rs
If Cs is removed, it affects the gain of the circuit.

23. AC Equivalent Circuit

24. Impedances Input Impedance: Output Impedance:
Saat Vi=0, maka dari sisi input  Vgs+gmVgsRs =0 atau Vgs+(Io+ID)Rs=0, sehingga Vgs=-(Io+ID)Rs

25. Impedances
Menghitung Zo didapatkan dengan cara bantuan arus Io, sedangkan untuk penguatan tegangan bantuan arus Io dihilangkan kembali\

26. Voltage Gain

27. Voltage Gain

28. Example

29. Solution

30. Solution

31. JFET CS Voltage-Divider Configuration
This is a CS amplifier configuration therefore the input is on the gate and the output is on the drain.

32. AC Equivalent Circuit

33. Impedances
Input Impedance:
Output Impedance:

34. Voltage Gain

35. JFET Source Follower (Common-Drain) Configuration
In a CD amplifier configuration the input is on the gate, but the output is from the source.

36. AC Equivalent Circuit

37. Impedances
Input Impedance:
Output Impedance:

38. Voltage Gain

39. Phase Relationship
A CD amplifier configuration has no phase shift between input and output.

40. JFET Common-Gate Configuration
The input is on source and the output is on the drain.

41. AC Equivalent Circuit

42. Impedances
Applying Kirchhoff’s voltage law around the output perimeter and Kirchhoff’s current law at node a ::

43. Impedances
Input Impedance:
Output Impedance:

44. Voltage Gain
Applying Kirchhoff’s current law at node b ::

45. Phase Relationship
A CG amplifier configuration has no phase shift between input and output.

46. Depletion-Type MOSFETs
D-MOSFETs have similar AC equivalent models.
The only difference is that VSGQ can be positive for n-channel devices and negative for p-channel devices.
This means that gm can be greater than gm0.

47. D-MOSFET AC Equivalent Model

48. Example Find VGSQ and IDQ Determine gm and compare to gm0 rd
Find Zi, Zo, Av

49. Enhancement-Type MOSFETs
There are two types of E-MOSFETs:
nMOS or n-channel MOSFETs
pMOS or p-channel MOSFETs

50. E-MOSFET AC Equivalent Model
Forward transfer admittance
gm and rd can be found in the specification sheet for the FET.

51. E-MOSFET CS Drain-Feedback Configuration

52. AC Equivalent Circuit

53. Impedances
Output Impedance:
Input Impedance:

54. The calculation

56. The AC analysis of E-MOSFET
Remember that, the biasing arrangement are limited for E-MOSFET

57. Voltage Gain

58. Phase Relationship
This is a CS amplifier configuration therefore it has 180-degree phase shift between input and output.

59. Do it
Determine input and output and also AV impedance for k=0.3X10-3

60. E-MOSFET CS Voltage-Divider Configuration

61. AC Equivalent Circuit

62. Impedances
Input Impedance:
Output Impedance:

63. Voltage Gain

64. Phase Relationship
This is a CS amplifier configuration therefore it has 180-degree phase shift between input and output.

65. Solution

66. E-MOSFET CS Voltage-Divider Configuration

67. AC Equivalent Circuit

68. Impedances
Input Impedance: [Formula 9.52]
Output Impedance: [Formula 9.53]
[Formula 9.54]

69. Voltage Gain
[Formula 9.55]
[Formula 9.56]

70. Summary Table

71. Summary Table

72. Try yourself
Design a self-bias network that have gain of 10. The device should be biased at VGSQ=1/3VP

73. Solution

74. To be continued……