1. D. De Venuto,Politecnico di Bari 0 Data Converter

2. D. De Venuto,Politecnico di Bari 1 (b) Input signal waveform. (c) sampling signal (control signal for the switch). (d) Output signal (to be fed to the A/D converter). Digital Signal Processing (a) Sample-and-hold (S/H) circuit. The switch closes  seconds every period. Process of periodically sampling an analog signal. (b) (c) (d)

3. D. De Venuto,Politecnico di Bari 2 A/D and D/A Converter A/D converter vA 123:N123:N D/A converter vA 123:N123:N The A/D and the D/A converters as circuit blocks: N-bit digital word.

4. D. De Venuto,Politecnico di Bari 3 An N-bit D/A converter using a binary-weighted resistive ladder network. D/A Converter: Binary-Weighted Resistor configuration

5. D. De Venuto,Politecnico di Bari 4 Basic circuit configurations of a DAC utilizing an R-2R ladder network. DAC: R-2R ladder network

6. D. De Venuto,Politecnico di Bari 5 A practical circuit implementation of a DAC utilizing an R-2R ladder network. DAC: Practical implementation

7. D. De Venuto,Politecnico di Bari 6 The dual-slope A/D conversion method. Note that v A is assumed to be negative. A/D Converter: Dual-slope

8. D. De Venuto,Politecnico di Bari 7 Charge-distribution A/D converter suitable for CMOS implementation. (a) Sample phase; (b) hold phase; and (c) charge-redistribution phase. The Charge-Redistribution A/D converter

9. D. De Venuto,Politecnico di Bari 8 Sigma-Delta A/D converter a b g f IN SUM CLK VR1 c d e