1. An Introduction to Assembler Language and Subroutine Linkages / Save Areas Ch.5 - Topic 1 See Page 95 Additional information on subroutines in Topic 1 of Chapter 8 if you wish to read ahead

2. General Purpose Registers 16 GRPs – live in the Processor All programs use the same 16 GPRs Each GPR is 4 bytes (1 fullword) Some GPRs should be avoided as they are often used by the Operating System –Reg 0 & 1used by system to pass info –Reg 13always points to current Savearea –Reg 14used for Return address –Reg 15used for Forward address That leaves you 11 GPRs for your use

3. Subroutines Program within a program Internal or External –Internal: Assembled with the Main Program –External: Assembled separately from the Main Program – introduces some interesting communication problems Requires Housekeeping –All routines must provide a Register Save Area –All routines should adhere to linkage conventions

6. START 0 Does not create object code Assembler Command Signals beginning of source code Establishes what should be the beginning location of the program If labeled, names the program Your program will be loaded into memory for its execution at location X’200’

7. Program Entry

8. REGS Creates names for the GPRs – Names appear in CROSS-REF list, numbers do not. Generates no Object Code

9. BEGIN Performs what SAVE macro does Names program (if not in START) Provides a SaveArea

10. USING *,12 Generates no object code Establishes a Base Register 1 st Operand indicates the address - * = address of next instruction 2 nd Operand identifies which register to use for Base Reg Normally (not always) goes with: BALR example loads the address of the next instruction into R12, then would Branch to the location in the 2 nd operand register – unless it is zero, then it does not Branch. Since USING establishes the Base register and BALR is first executable instruction in your program, your program is 2 bytes (length of BALR) different from load point of your program. BALR 12,0

11. BAL & BALR Branch & Link (4-byte & 2-byte) Places address of the next instruction into the 1 st operand (a Return Address?) Then branches to the address in the 2 nd operand (Entry to a Subroutine?) unless the second operand is zero, then it doesn’t branch. BALR12,0 USING*,12 Together BALR and USING establish addressability in your program. They need to appear in your program before the first symbolic reference used, which should be the next few instructions (not shown) which saves the calling programs registers into its savearea and makes your savearea current.

12. BAL & BALR SAVE macro is changed into a STM 14,12,12(13) instruction. Recall, it saves the calling programs registers. The next executable instruction is BALR to establish addressability in your program.

13. SAVE A standard Macro Instruction Generates multiple Assembler instructions If used, it follows START (or CSECT) Almost always coded as: SAVE (14,12)

14. RETURN A standard Macro Instruction Acts as the back end of SAVE - - Restores registers that were SAVE’d and branches back to the calling program L13,SAVEAREA+4 RETURN(14,12)

15. LOAD(L, LR) 4-byte or 2-byte instruction Takes contents of 2 nd operand and places it as contents of the 1 st operand In both formats, 1 st operand is a GPR

16. LOAD(L,LR) GPR 3DIVISOR BEFORE:00 00 00 00 01 5C AFTER:00 00 01 5C L3,DIVISOR Load is used to move 4-bytes from memory into a register. Register instructions execute faster since they are located closer to the processor than memory. This is especially useful if the same value is to be used multiple times in a program.

17. LOAD ADDRESS(LA) 4-byte format only Takes the address of the 2 nd operand (rather than the contents) and makes it the contents of the 1 st operand LA13,SAVEAREA The location (not the contents of the first word) is loaded into register 13

18. STORE(ST) 4-byte format Takes the contents of the 1 st operand and makes it the contents of the 2 nd operand Reverse of LOAD ST13,SAVEAREA+4 The content of register 13 is moved to memory into SAVEAREA+4 in the program (a fullword). Remember that Load moved a fullword in the other direction – from memory into the register. There is no STORE instruction in the RR- format – A STR instruction would do the exact same thing as the LR instruction, if there was such an instruction as STR.

19. Extended Logical Branching B BH BL BE BNH BNL BNE Unconditional Branch if 1 st operand High Branch if 1 st operand Low Branch if both operands Equal Branch if 1 st operand Not High Branch if 1 st operand Not Low Branch of operands Not Equal See page 114 - top The contents of the first operand is compared to the contents of the second operand and the Branch is taken based on the results of the compare. If condition is not true, then the Branch is not taken.

20. END Assembler Command Generates no instruction Opposite of START (or CSECT) Simply tells the Assembler there are no more source statements to decode

21. The End